Talk:Xeon Phi

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Article title change to Xeon Phi

Now that the Intel MIC is officially called/branded Xeon Phi, I think it deserves a title change. --Aizuku (talk) 09:59, 21 June 2012 (UTC)[reply]

Done. SilverbackNet^(talk) 00:42, 24 January 2014 (UTC)[reply]

August 2012

Architectural detail at SemiAccurate.com 2.98.250.126 (talk) 17:28, 3 September 2012 (UTC)[reply]

There are inconsistencies with data

Some sources state in 2007 it was a 80 core chip that used 62ws and it was 45 or 65 nm process..forget which one it was. Another source says its a 22nm chip with 50 cores so which ones have which power usage. If it is now a 50 core 22nm chip than it used to use 62ws than it should be ~half the power due to die shrink — Preceding unsigned comment added by DCMAKER (talk • contribs) 05:57, 2 October 2012 (UTC)[reply]

They're different chips - read it again.

Single-chip Cloud Computer

Does the wiki article really have to follow that "Single-chip Cloud Computer" buss-word PR BS ? --95.116.220.86 (talk) 11:44, 10 November 2012 (UTC) out of the cloud.[reply]

nov 12 release

There is new intel press-release about xeon phi models: http://newsroom.intel.com/community/intel_newsroom/blog/2012/11/12/intel-delivers-new-architecture-for-discovery-with-intel-xeon-phi-coprocessors with some details and pricing. `a5b (talk) 12:04, 14 November 2012 (UTC)[reply]

bad source?

The article says

In June 2012, ScaleMP announced it will provide its virtualization software to allows using 'Knight's Corner' chips (branded as 'Xeon Phi') as main processor transparent extension. The virtualization software will allow 'Knight's Corner' run legacy MMX/SSE code and access unlimited amount of (host) memory without need for code changes.^[1]

but the linked press release doesn't say anything about support for MMX/SSE or other ISA extensions not supported by Xeon Phi. It talks about turning multiple independent servers into one server and giving all processors access to all memory, independent if they are a coprocessor or host processor, but that is something completely different.

Anyone can clarify or correct? 92.229.33.172 (talk) 16:17, 16 November 2012 (UTC)[reply]

References

^ "ScaleMP vSMP Foundation to Support Intel Xeon Phi", www.ScaleMP.com, ScaleMP, 20 Jun 2012 {{citation}}: Cite has empty unknown parameter: |1= (help)

Typo

Furthermore there is a Typo within the sources.

19. "Intel News Release : Intel Unveils New Product Plans dor High-Performance Computing", www.intel.com, Intel, May 31, 2010

Reads dor in Wikipedia but for in https://www.intel.com/pressroom/archive/releases/2010/20100531comp.htm.

Fixed. Guy Harris (talk) 06:57, 5 February 2019 (UTC)[reply]

Split the product from the firm?

Should we create separate page about Xeon Phi, its implementation and versions? Intel MIC is a big and long project while Xeon Phi is one of products, released from MIC. a5b (talk) 22:35, 25 December 2013 (UTC)[reply]

Needs rewrite

Much of the article is written in Proseline - e.g. "On January 1, 2000, Intel announced something something." This is bad writing and needs to be restructured into paragraphs of verifiable facts. Dates and sources can be verified with references. --Vossanova ^o< 15:59, 21 June 2016 (UTC)[reply]

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Proposed new lead section.

Here's my rewrite of the lead, feel free to add to it. Few weeks later we can make up our mind using it maybe?

Xeon Phi is a brand name given to a series of massively-parallel multicore processors designed, manufactured, marketed, and sold by Intel, targeted at supercomputing, enterprise, and high-end workstation markets. Initially in the form of PCIe-based add-on cards, afterwards(cite Knights Landing source here) also in the form of (main) CPUs.

In June 2013, the Tianhe-2 supercomputer at the National Supercomputing Center in Guangzhou (NSCC-GZ) was announced[4] as the world's fastest supercomputer. It utilizes Intel Xeon Phi coprocessors and Ivy Bridge-EP Xeon processors to achieve 33.86 petaFLOPS.[5]

Competitors include Nvidia's Tesla-branded product lines.

Dannyniu (talk) 05:34, 19 October 2016 (UTC)[reply]

Xeon Phi is not a brand of PCI cards. It is true that Knights Ferry (which wasn't a product) and Knights Corner were only shipped as coprocessors (i.e. PCI cards), but Knights Landing will be shipped as both a standalone server process and a PCI card:

"Knights Landing ... in a standard CPU form factor ... in the traditional PCIe* coprocessor form factor."
— Source https://software.intel.com/en-us/articles/what-disclosures-has-intel-made-about-knights-landing

Jeff.science (talk) 05:58, 19 October 2016 (UTC), who works for Intel as of this date but is not speaking in any official capacity and will only reference or discuss officially released information about Intel products.[reply]

I changed it a bit, how's that look? Dannyniu (talk) 07:46, 19 October 2016 (UTC)[reply]

The problem was the PCI part, not brand vs series. Jeff.science (talk) 17:09, 19 October 2016 (UTC)[reply]

@Jeff.science Yes, I noted that and did further change.Dannyniu (talk) 03:58, 20 October 2016 (UTC)[reply]

That's better. Thanks. Jeff.science (talk) 04:54, 20 October 2016 (UTC)[reply]

x86-16

I can't confirm whether any of the Xeon Phi chips support any of the 16-bit modes. I would expect that the later chips that are used as CPUs directly would support real mode like any other x86 chips but the PCI cards may not. I think that Knight's Landing at least is covered by the Intel Architecture Manual and thus without a specific note in there would support 16-bit mode. It was hard to find details about the exact startup process in the programmer's documentation for the coprocessor form since it was clearly intended to only be run with Intel's special build of Linux. It was later opened to allow custom operating systems but the documentation for that is not great. I can at least confirm that IA-32 mode is supported (though I'm writing this a little later and now I can't remember if it was in legacy or compatibility mode (or both)). — Preceding unsigned comment added by BryceMW-CA (talk • contribs) 21:59, 1 May 2024 (UTC)[reply]

I've found the PDF that I had looked at before and added a citation. It says that 32-bit and 64-bit modes are supported. It also says that the compatibility 32-bit mode isn't supported (thus only legacy mode). There is a place that mentions 16-bit mode but only in the context of the entrypoints to the Linux kernel and that it only supports the 32-bit entrypoint so that doesn't help. But I would consider that there is no support for 32-bit compatibility mode proof enough that Virtual 8086 mode probably isn't supported either and at that point I would see no reason for real mode to be supported either but I think that I would need to test it out to be sure. The cards aren't terribly expensive these days... — Bryce (Talk) 22:31, 1 May 2024 (UTC)[reply]

[1] "ScaleMP vSMP Foundation to Support Intel Xeon Phi", www.ScaleMP.com, ScaleMP, 20 Jun 2012 {{citation}}: Cite has empty unknown parameter: |1= (help)

[1]