Zero state response

In electrical circuit theory, the zero state response (ZSR) is the behaviour or response of a circuit with initial state of zero. The ZSR results only from the external inputs or driving functions of the circuit and not from the initial state.

The total response of the circuit is the superposition of the ZSR and the ZIR, or Zero Input Response. The ZIR results only from the initial state of the circuit and not from any external drive. The ZIR is also called the natural response, and the resonant frequencies of the ZIR are called the natural frequencies. Given a description of a system in the s-domain, the zero-state response can be described as Y(s)=Init(s)/a(s) where a(s) and Init(s) are system-specific.

Zero state response and zero input response in integrator and differentiator circuits

One example of zero state response being used is in integrator and differentiator circuits. By examining a simple integrator circuit it can be demonstrated that when a function is put into a linear time-invariant (LTI) system, an output can be characterized by a superposition or sum of the Zero Input Response and the zero state response.

A system can be represented as

$f(t)\,$ $y(t)=y(t_{0})+\int _{t_{0}}^{t}f(\tau )d\tau$

with the input $f(t).\$ on the left and the output $y(t).\$ on the right.

The output $y(t).\$ can be separated into a zero input and a zero state solution with

$y(t)=\underbrace {y(t_{0})} _{Zero-input\ response}+\underbrace {\int _{t_{0}}^{t}f(\tau )d\tau } _{Zero-state\ response}.$

The contributions of $y(t_{0})\,$ and $f(t)\,$ to output $y(t)\,$ are additive and each contribution $y(t_{0})\,$ and $\int _{t_{0}}^{t}f(\tau )d\tau$ vanishes with vanishing $y(t_{0})\,$ and $f(t).\,$

This behavior constitutes a linear system. A linear system has an output that is a sum of distinct zero-input and zero-state components, each varying linearly, with the initial state of the system and the input of the system respectively.

The zero input response and zero state response are independent of each other and therefore each component can be computed independently of the other.

Zero state response in integrator and differentiator circuits

The Zero State Response $\int _{t_{0}}^{t}f(\tau )d\tau$ represents the system output $y(t)\,$ when $y(t_{0})=0.\,$

When there is no influence from internal voltages or currents due to previously charged components

$y(t)=\int _{t_{0}}^{t}f(\tau )d\tau .\,$

Zero state response varies with the system input and under zero-state conditions we could say that two independent inputs results in two independent outputs:

$f_{1}(t)\,$$y_{1}(t)\,$

and

$f_{2}(t)\,$$y_{2}(t).\,$

Because of linearity we can then apply the principles of superposition to achieve

$Kf_{1}(t)+Kf_{2}(t)\,$$Ky_{1}(t)+Ky_{2}(t).\,$

Verifications of zero state response in integrator and differentiator circuits

To arrive at general equation

Simple Integrator Circuit

The circuit to the right acts as a simple integrator circuit and will be used to verify the equation $y(t)=\int _{t_{0}}^{t}f(\tau )d\tau \,$ as the zero state response of an integrator circuit.

Capacitors have the current-voltage relation $i(t)=C{\frac {dv}{dt}}$ where C is the capacitance, measured in farads, of the capacitor.

By manipulating the above equation the capacitor can be shown to effectively integrate the current through it. The resulting equation also demonstrates the zero state and zero input responses to the integrator circuit.

First, by integrating both sides of the above equation

$\int _{a}^{b}i(t)dt=\int _{a}^{b}C{\frac {dv}{dt}}dt.$

Second, by integrating the right side

$\int _{a}^{b}i(t)dt=C[v(b)-v(a)].$

Third, distribute and subtract $Cv(a)\,$ to get

$Cv(b)=Cv(a)+\int _{a}^{b}i(t)dt.$

Fourth, divide by $C\,$ to achieve

$v(b)=v(a)+{\frac {1}{C}}\int _{a}^{b}i(t)dt.$

By substituting $t\,$ for $b\,$ and $t_{o}\,$ for $a\,$ and by using the dummy variable $\tau \,$ as the variable of integration the general equation

$v(t)=v(t_{0})+{\frac {1}{C}}\int _{t_{0}}^{t}i(\tau )d\tau$

is found.

To arrive at circuit specific example

The general equation can then be used to further demonstrate this verification by using the conditions of the simple integrator circuit above.

By using the capacitance of 1 farad as shown in the integrator circuit above

$v(t)=v(t_{0})+\int _{t_{0}}^{t}i(\tau )d\tau ,$

which is the equation containing the zero input and zero state response seen at the top of the page.

To verify zero state linearity

To verify its zero state linearity set the voltage around the capacitor at time 0 equal to 0, or $v(t_{0})=0\,$, meaning that there is no initial voltage. This eliminates the first term forming the equation

$v(t)=\int _{t_{0}}^{t}i(\tau )d\tau .\,$.

In accordance with the methods of linear time-invariant systems, by putting two different inputs into the integrator circuit, $i_{1}(t)\,$ and $i_{2}(t)\,$, the two different outputs

$v_{1}(t)=\int _{t_{0}}^{t}i_{1}(\tau )d\tau \,$

and

$v_{2}(t)=\int _{t_{0}}^{t}i_{2}(\tau )d\tau \,$

are found respectively.

By using the superposition principle the inputs $i_{1}(t)\,$ and $i_{2}(t)\,$ can be combined to get a new input

$i_{3}(t)=K_{1}i_{1}(t)+K_{2}i_{2}(t)\,$

and a new output

$v_{3}(t)=\int _{t_{0}}^{t}(K_{1}i_{1}(\tau )+K_{2}i_{2}(\tau ))d\tau .$

By integrating the right side of

$v_{3}(t)=K_{1}\int _{t_{0}}^{t}i_{1}(\tau )d\tau +K_{2}\int _{t_{0}}^{t}i_{2}(\tau )d\tau ,$

$v_{3}(t)=K_{1}v_{1}(t)+K_{2}v_{2}(t)\,$

is found, which implies the system is linear at zero state, $v(t_{0})=0\,$.

This entire verification example could also have been done with a voltage source in place of the current source and an inductor in place of the capacitor. We would have then been solving for a current instead of a voltage.

Zero state response industry uses

The circuit analysis method of breaking a system output down into a zero state and zero input response is used industry wide including circuits, control systems, signal processing, and electromagnetics. Also most circuit simulation software, such as SPICE, support the method in one form or another.