User:WimdeValk

Name:

• Wim de Valk (W.M.J. de Valk)

Occupation:

• Retired teacher of microelectronics at Fontys University of Applied Sciences, Institute of Engineering, Eindhoven, Netherlands

Residence:

• Oss - Netherlands

Email:

• W.deValk@Fontys.nl

Created articles:

• Espresso heuristic logic minimizer (also a Dutch version)
• Logic redundancy (also a Dutch version)

Donated public-domain software: Publicad © Ir. W. de Valk

• Minilog logic function minimizer
• Faultsim serial stuck-at fault simulator with FsExpand netlist expander
• Publicad design kit including Minilog, Faultsim, FsExpand, VHDL extractor Sch2Vhdl with libraries for ispTOOLS and VHDL simulation
• ZXSIM block oriented system simulator
• Z-Domain simulation of digital filters