Template talk:Features of AMD Processors with 3D Graphics

AMD hardware templates

Please keep both the templates Template:AMD APU features and Template:AMD GPU features up-to-date. User:ScotXW^t@lk 11:47, 15 June 2015 (UTC)[reply]

Platform split?

What exactly is the reason for that weird split between desktop, mobile and ultra-mobile? It is kind of confusing when reading the released row and it suddenly starts again at 2011. I think it would be better to sort all be "released". Wikiinger (talk) 19:09, 2 May 2017 (UTC)[reply]

It made sense in the context of the ultramobile CPUs being based on a distinct architecture (Cat series) from the desktop/mobile series. It still makes some sense as these a pretty distinct parts, until the Stoney Ridge series anyway. Dbsseven (talk) 20:24, 2 May 2017 (UTC)[reply]

The split still makes sense because the ultra-mobile parts are "lite" even when based on the same architecture. 217.162.74.13 (talk) 18:59, 4 January 2020 (UTC)[reply]

What the slides call Dalí is not ultra-mobile because it only goes down to 12W. 217.162.74.13 (talk) 17:25, 8 January 2020 (UTC)[reply]

@Wikiinger:, I've removed the boundary column as it seems very anachronistic now. The "Platform" row is now on the top, and that makes sesne of the lower columns a bit better. -- Mikeblas (talk) 21:10, 26 October 2021 (UTC)[reply]

PCIe lanes

The table still does not show how many PCIe lanes the APUs support at full bandwidth. 217.162.74.13 (talk) 18:49, 4 January 2020 (UTC)[reply]

"Integer structure"?

What does the "integer structure" line in this table mean? There are no references or links given, and I can't find any information on it. Should it just be deleted? -- Mikeblas (talk) 15:47, 27 October 2021 (UTC)[reply]

I've removed this line from the table. -- Mikeblas (talk) 15:03, 30 November 2021 (UTC)[reply]

It is a simplified description of the integer pipeline execution unit structure. Trigenibinion (talk) 22:49, 26 November 2022 (UTC)[reply]

Correct 3DNow! support?

The line for 3DNow! says that it's only supported on K10 microarchitceture, and nothing newer. This seems to contradict the line that says PREFETCH and PREFETCHW are supported on all microarchitcetures in this table, since thos instructions are a part of the 3DNow! instruction set.

There are no references for this information in the table. Is it correct? -- Mikeblas (talk) 16:39, 27 October 2021 (UTC)[reply]

I've removed the erroneous 3DNow! line and renamed the PREFETCH row; this makes the 3DNow! support clear, correct, and not redundant. -- Mikeblas (talk) 15:09, 30 November 2021 (UTC)[reply]

3DNow! was made up of dozens of instructions. Keeping two of the instructions in newer CPUs does not equal supporting 3DNow! It's explained right in the introduction of the article. -- Lightkey (talk) 09:33, 11 April 2022 (UTC)[reply]

There are also different versions of 3DNow!, that's why a checkmark is not enough. Trigenibinion (talk) 22:47, 26 November 2022 (UTC)[reply]