Talk:Memory divider

Cleanup needed?

Anyone think this page is in need of revision? The first several paragraphs are ripe with awkward phrasing. I did some revision, but don't want to do any more for fear of changing the original meaning. (I'm not familiar with the subject matter of the page) Achilles2.0 (talk) 21:05, 5 March 2008 (UTC)[reply]

Example numbers check

Please could someone with the technical knowledge required check the numbers in the Example section of the article - some of it is just bad maths (I changed one instance of this, but I am unsure whether the result is correct with regards to the meaning it tries to convey) and other parts are worded slightly ambiguously, especially with regards to what I have read on other pages that mention this (the DDR and Front_side_bus pages primarily). Peter Law (talk) 13:33, 24 April 2008 (UTC)[reply]

Example Corrected

Indeed the example was wrong which showed calculated base clock for DDR memory as 400 MHz. I have corrected the example and made the language of the exapmle a bit more easy to understand. —Preceding unsigned comment added by 61.2.23.58 (talk) 17:11, 27 April 2008 (UTC)[reply]

Wrong example

I think the example is incorrect in the box after "Using I/O bus frequency of 200 MHz various types of DRAM will operate as". Al types operate at 200 MHz (400 MHz effective). The difference between the types is the frequency at which they operate internally: DDR at 200 MHz, DDR2 at 100MHZ and DDR3 at 50 MHZ (if it would exist) —Preceding unsigned comment added by 77.61.201.19 (talk) 08:00, 17 May 2010 (UTC)[reply]

External links modified (January 2018)

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