| Discussion Topic |
Replies (estimated) |
Archive Link
|
| Influence on SPARC |
2 |
Talk:MIPS architecture#Influence on SPARC
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| Use in TiVo |
1 |
Talk:MIPS architecture#Use in TiVo
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| Sort of biased, but… |
3 |
Talk:MIPS architecture/Archive 1#Sort of biased, but…
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| Instruction Set Summary |
1 |
Talk:MIPS architecture/Archive 1#Instruction Set Summary
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| MIPS syscalls? |
2 |
Talk:MIPS architecture/Archive 1#MIPS syscalls?
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| Major designers and contributors |
1 |
Talk:MIPS architecture/Archive 1#Major designers and contributors
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| MDMX not clear |
2 |
Talk:MIPS architecture/Archive 1#MDMX not clear
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| Influence on later RISC ISAs |
1 |
Talk:MIPS architecture/Archive 1#Influence on later RISC ISAs
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| Trivia |
1 |
Talk:MIPS architecture/Archive 1#Trivia
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| Microprocessor support in R3000 |
2 |
Talk:MIPS architecture/Archive 1#Microprocessor support in R3000
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| VPEs, TCs, ... |
1 |
Talk:MIPS architecture/Archive 1#VPEs, TCs, ...
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| Opcode format unclear |
3 |
Talk:MIPS architecture/Archive 1#Opcode format unclear
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| Processor speeds |
1 |
Talk:MIPS architecture/Archive 1#Processor speeds
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| Mipsel |
2 |
Talk:MIPS architecture/Archive 1#Mipsel
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| Delay slot |
3 |
Talk:MIPS architecture/Archive 1#Delay slot
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| NEC |
1 |
Talk:MIPS architecture/Archive 1#NEC
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| Pipeline definition |
2 |
Talk:MIPS architecture/Archive 1#Pipeline definition
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| Add Tandem Computers to list of manufacturers |
1 |
Talk:MIPS architecture/Archive 1#Add Tandem Computers to list of manufacturers
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| R6000 did not deliver? |
2 |
Talk:MIPS architecture/Archive 1#R6000 did not deliver?
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| XMT |
3 |
Talk:MIPS architecture/Archive 1#XMT
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| Opcode versus Assembly |
1 |
Talk:MIPS architecture/Archive 1#Opcode versus Assembly
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| Higher speed R3000 and R4000 Chips? |
1 |
Talk:MIPS architecture/Archive 1#Higher speed R3000 and R4000 Chips?
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| false statement : However, as Intel quickly released faster versions of their Pentium class CPUs, Microsoft Windows NT v4.0 dropped support for anything but Intel |
1 |
Talk:MIPS architecture/Archive 1#false statement : However, as Intel quickly released faster versions of their Pentium class CPUs, Microsoft Windows NT v4.0 dropped support for anything but Intel
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| How can a controller become a MIPS controller? |
3 |
Talk:MIPS architecture/Archive 1#How can a controller become a MIPS controller?
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| Description of addu / addiu is wrong (I think) |
1 |
Talk:MIPS architecture/Archive 1#Description of addu / addiu is wrong (I think)
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| PIC32 |
2 |
Talk:MIPS architecture/Archive 1#PIC32
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| MIPS based Supercomputers |
1 |
Talk:MIPS architecture/Archive 1#MIPS based Supercomputers
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| Unsigned vs. Signed Add/Subtract is a Misnomer |
4 |
Talk:MIPS architecture/Archive 1#Unsigned vs. Signed Add/Subtract is a Misnomer
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| Immediate pointers? |
3 |
Talk:MIPS architecture/Archive 1#Immediate pointers?
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| XBurst |
2 |
Talk:MIPS architecture/Archive 1#XBurst
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| Proposal: Divest the article of content about MIPS implementations |
2 |
Talk:MIPS architecture/Archive 1#Proposal: Divest the article of content about MIPS implementations
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| MFC/MTC vs CFC/CTC |
1 |
Talk:MIPS architecture/Archive 1#MFC/MTC vs CFC/CTC
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| Why MIPS V section? |
1 |
Talk:MIPS architecture/Archive 1#Why MIPS V section?
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| Archiving |
2 |
Talk:MIPS architecture/Archive 1#Archiving
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| Replace the "MIPS assembly language" section? |
2 |
Talk:MIPS architecture/Archive 1#Replace the "MIPS assembly language" section?
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| Mips32 & Mips64? |
1 |
Talk:MIPS architecture/Archive 1#Mips32 & Mips64?
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| Earl Killian article subject to deletion |
1 |
Talk:MIPS architecture/Archive 1#Earl Killian article subject to deletion
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| success followed success: vague and imprecise language |
1 |
Talk:MIPS architecture/Archive 1#success followed success: vague and imprecise language
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| Who uses SPIM? |
2 |
Talk:MIPS architecture/Archive 1#Who uses SPIM?
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| Wrong description |
1 |
Talk:MIPS architecture/Archive 1#Wrong description
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| Coprocessor instruction opcodes and encoding |
1 |
Talk:MIPS architecture/Archive 1#Coprocessor instruction opcodes and encoding
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| footnote 12 link goes to a login page |
2 |
Talk:MIPS architecture/Archive 1#footnote 12 link goes to a login page
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| N64 calling convention name |
1 |
Talk:MIPS architecture/Archive 1#N64 calling convention name
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| MIPS licensees: soft IP and hard IP |
1 |
Talk:MIPS architecture/Archive 2#MIPS licensees: soft IP and hard IP
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| Missing JALR instruction? |
1 |
Talk:MIPS architecture/Archive 2#Missing JALR instruction?
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| CPU family section improvement (table) |
1 |
Talk:MIPS architecture/Archive 2#CPU family section improvement (table)
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| Free MIPS64 Simulator |
1 |
Talk:MIPS architecture/Archive 2#Free MIPS64 Simulator
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| move MIPS architecture to MIPS instruction set |
6 |
Talk:MIPS architecture/Archive 1#move MIPS architecture to MIPS instruction set
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| The lw and sw instructions are both real and pseudo |
1 |
Talk:MIPS architecture/Archive 2#The lw and sw instructions are both real and pseudo
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| Computer architecture courses in universities and technical schools often study the MIPS architecture.[6] |
1 |
Talk:MIPS architecture/Archive 2#Computer architecture courses in universities and technical schools often study the MIPS architecture.[6]
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| "Load-store" vs. "register-based" |
3 |
Talk:MIPS architecture/Archive 1#"Load-store" vs. "register-based"
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| Requested move 1 April 2017 |
7 |
Talk:MIPS architecture/Archive 1#Requested move 1 April 2017
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| Move Pseudo Instruction |
1 |
Talk:MIPS architecture/Archive 1#Move Pseudo Instruction
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| External links modified |
1 |
Talk:MIPS architecture#External links modified
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| Remove of Comprehensive List of MIPS I Instructions and Opcodes |
4 |
Talk:MIPS architecture#Remove of Comprehensive List of MIPS I Instructions and Opcodes
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| its really hard to find the full instruction set |
1 |
Talk:MIPS architecture#its really hard to find the full instruction set
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| MIPS Technologies moves to RISC-V |
1 |
Talk:MIPS architecture#MIPS Technologies moves to RISC-V
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