Talk:Instructions per cycle

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IPS or IPC?

Which is the standard? Instructions per second or instructions per cycle? The wikipedia page for instructions per second (IPS) is much better laid out than this one. — Preceding unsigned comment added by 77.163.194.56 (talk) 19:15, 16 July 2016 (UTC)[reply]

I agree completely. The table doesn't make sense. The core can issue so many SP and DP floating point operations per cycle, but they won't complete in one cycle. It's not a straight multiplication. Say it can issue 4 SP floating point operations per cycle using one instruction, but those floating point operations can take several cycles to complete. — Preceding unsigned comment added by 208.126.206.101 (talk) 05:39, 5 May 2017 (UTC)[reply]

Examples, Typical Values?

Some numerical examples for different processor types/generations would be nice. 195.135.137.107 15:50, 11 July 2007 (UTC)[reply]

Brainiac and speed demons?

The passage about brainiac designs and speed demon designs is completely false. I've not been able to find corroborating sources anywhere. The incorrect information was originally added in revision 35219849. I'm removing the information as per WP:BOLD. --Tpk5010 _Talk^Contribs 02:45, 3 December 2009 (UTC)[reply]

Wanna also ARM, PowerPC, MIPS...

Even if they are significantly slower. Just for IPC comparison of different instruction sets. — Preceding unsigned comment added by Pavel Senatorov (talk • contribs) 12:26, 18 October 2016 (UTC)[reply]

Comparing IPC between different instructions sets is meaningless and deceiving. There is no point doing this on its own. IPC is useful for comparing generation to generation improvements, or between competitors implementing same ISA. 2A02:168:2000:5B:B286:589F:2352:96B8 (talk) 17:26, 9 July 2020 (UTC)[reply]

Integer operations

It would be good if the table had a column for integer operations. Bubba73 ^{You talkin' to me?} 04:59, 21 October 2017 (UTC)[reply]