Talk:Application-specific integrated circuit/Archive 1

Archive 1

Miscellaneous

ASIC

---

Put your text for the new page here. Application Specific IC design in Verilog,VHDL hardware Lagueage

---

So a new page about the design process? Good idea. You should give it a name and just start slapping text on the page itself, rather than accumulating it here, IMHO.

How about ASIC_Design as a page name?

---

Can someone add an explanation of application specific standard products (ASSP) here, or write a new article?

---

I think I am going to migrate the section I just added about Standard cell design to ASIC_Design and truy to leave this article to capture what an ASIC is, not how they are designed.

---

I'm willing (and able) to help with ASIC_Design. If there are no objections I'll start adding more modern flow information. Randyest 07:51, 5 December 2006 (UTC)

---

"For most ASIC manufacturers, this consists of from two to as many as five metal layers, each metal layer running perpendicular to the one below it."

Maybe parallel, not perpendicular? 85.140.207.85 23:06, 1 January 2007 (UTC)

EasyPath

The description of Xilinx's EasyPath isn't really correct. The EasyPath program provides FPGAs that are of identical design to standard Xilinx products, including the ability (and requirement) to be programmed. For the EasyPath program, Xilinx implements alternative testing procedures that may allow chips with some defective elements to be qualified for use with specific customer designs. This is feasible because most designs leave many elements of an FPGA unused, thus a chip that may be defective with respect to the standard FPGA's specification may have no problem at all implementing a particular design. As a result, Xilinx can sell chips that would otherwise be discarded as defective; this is largely responsible for the reduction in per-piece cost. Unfortunately, Xilinx's public information is generally not very straightforward about the precise nature of EasyPath, so I'm not sure of a good source that can be cited for this. 168.103.250.64 20:31, 16 January 2007 (UTC)

---

"The Non-recurring engineering cost (the cost to set up the factory to produce a particular ASIC) can run into hundreds of thousands of dollars."

Hundreds of millions of dollars seems more accurate I think.

---

""The Non-recurring engineering cost (the cost to setup the factory to produce a particular ASIC) can run into hundreds of thousands of dollars."

Hundreds of millions of dollars seems more accurate I think."

No, hundreds of thousands of dollars is correct. ASIC NRE rarely exceeds a million in NRE costs. —Preceding unsigned comment added by 207.8.91.2 (talk) 23:00, 22 February 2010 (UTC)

better description needed

When I worked at Data I/O (documentation, not engineering), I was surprised to learn that an ASIC is nothing of the sort -- it's actually an ANSIC. (Yes, I know there's no such official term.) The "raw" chip has no specific function, but is "programmed" (links are blown or shorted) to turn it into a device with the desired functions.

The principal difference between an ASIC and an FPGA is that the latter can be reprogrammed. If it's this irreversibility that makes an ASIC "application-specific", it's a perverse use of language. It's like saying that concrete -- which can be poured into an almost-unlimited number of shapes -- is an "application-specific" material. WilliamSommerwerck (talk) 12:58, 21 May 2011 (UTC)

I don't know what you mean by ANSIC. ASICs are almost like full-custom chips, except that the circuits that may be placed on the chip (NAND, latch, register, adder, etc.) are pulled from a pre-designed library, and general decisions about the levels of metal that distribute power and signal have already been made. The goal is to provide most of the flexibility of a full-custom chip but with faster turn-around and lower engineering expense, so it will be affordable for a specific application, as opposed to commodity chips where the engineering expense may be distributed over a huge number of units. Jc3s5h (talk) 14:36, 21 May 2011 (UTC)

Possible redundancy

Isn't "standard-cell" cell libraries" redundant? ICE77 (talk) 07:54, 3 December 2011 (UTC)

No, as "Standard-cell" is the name of the library, while "cell libraries" are the type of libraries they are. It is possible that there is a ""standard-cell" hive library" or a ""standard-hive" cell library" (these examples are only examples) - Of course I may have less of a grasp on this than I think. ~AeSix 173.65.234.244 (talk) 03:59, 4 February 2014 (UTC)

Bitcoin

I type "ASIC" into google search and see numerous Bitcoin-related links. Maybe something about this should be included into the article? — Preceding unsigned comment added by Vi2 (talk • contribs) 06:29, 27 April 2013 (UTC)

I would like to also know more about these bitcoin miners. Though this probably deserves it's own page... or not. But do bitcoin miners only work for bitcoin, or are they actually sha-256 asic devices that are targeted at bitcoin mining? Would someone be able to repurpose a bitcoin miner for use with other sha-256 work? Possibly as encryption as well as decryption devices? This could be useful for near-real-time encrypted communications, as well as a plethora of other tasks. ~AeSix 173.65.234.244 (talk) 03:59, 4 February 2014 (UTC)