Paritosh Pandya
Paritosh K. Pandya | |
|---|---|
| Born | |
| Nationality | Indian |
| Known for | DCVALID[2] |
| Awards | 2020 Test-of-Time Award[1] |
| Scientific career | |
| Institutions | Oxford University Computing Laboratory, Tata Institute of Fundamental Research |
| Academic advisors | Mathai Joseph |
Paritosh K. Pandya is an Indian computer scientist based at the Tata Institute of Fundamental Research (TIFR) in Mumbai, India. Since 2020, he is an adjunct professor at IIT Bombay.[3]
Paritosh Pandya studied for a BE degree in Electronics at the Maharaja Sayajirao University of Baroda (1980), MTech degree in Computer Science at IIT Kanpur (1982), and a PhD in Computer Science at Bombay University/TIFR (1988).[4]
From 1988, Paritosh Pandya has held academic posts at TIFR.[4] He was a researcher at the Oxford University Computing Laboratory in England during 1989–91, on leave from TIFR, undertaking research with Jonathan Bowen, Jifeng He, and Tony Hoare, amongst others, as part of the ESPRIT ProCoS project on "Provably Correct Systems". He then returned to TIFR, where he has spent most of his career. Pandya leads the Theoretical Computer Science Group there.
Pandya's main research interest is in the area of formal methods, including real-time systems. He has been especially involved with research concerning Duration Calculus, including the DCVALID model-checking tool.[2] His most cited paper, "Finding Response Times in a Real-Time System", with over 1,500 citations on Google Scholar in 2021,[5] was joint work with Mathai Joseph, published in The Computer Journal in 1986.[6] This paper won a 2020 Test-of-Time Award, announced at the 27th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2021).[1]
Paritosh Pandya has been a member of the Editorial Board for the Formal Aspects of Computing journal published by Springer.[7]
References
[edit]- ^ a b "TCRTS Awards – 2020 Test-of-Time Awards". RTAS 2021: 27th IEEE Real-Time and Embedded Technology and Applications Symposium. May 2021. Retrieved 22 May 2021.
- ^ a b Pandya, Paritosh (1997–2001). "DCVALID: A tool for modelchecking Duration Calculus Formulae". India: Tata Institute of Fundamental Research. Retrieved 29 January 2014.
- ^ "Paritosh K. Pandya : Home Page". www.cse.iitb.ac.in. Retrieved 18 September 2022.
- ^ a b "Curriculum Vitae: Paritosh K. Pandya". India: Tata Institute of Fundamental Research. Retrieved 29 January 2014.
- ^ "Finding response times in a real-time system". Google Scholar. Retrieved 24 May 2021.
- ^ Joseph, Mathai; Pandya, Paritosh (1986). "Finding Response Times in a Real-Time System". The Computer Journal. 29 (5): 390–395. doi:10.1093/comjnl/29.5.390.
- ^ "Editorial Board". Formal Aspects of Computing. Springer. Retrieved 29 January 2014.
External links
[edit]- Official website
- Paritosh Pandya publications indexed by Google Scholar
- Paritosh K. Pandya at DBLP Bibliography Server
- Paritosh Pandya publications on Academia.edu
- Paritosh Pandya on Mendeley
- Publications by Paritosh K. Pandya at ResearchGate
| International | |
|---|---|
| National | |
| Academics | |
| Other | |
- Living people
- Maharaja Sayajirao University of Baroda alumni
- IIT Kanpur alumni
- University of Mumbai alumni
- Tata Institute of Fundamental Research alumni
- Indian computer scientists
- Theoretical computer scientists
- Formal methods people
- Members of the Department of Computer Science, University of Oxford
- Academic staff of Tata Institute of Fundamental Research