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Elxsi

From Wikipedia, the free encyclopedia
Elxsi Corporation
IndustryComputers
Founded1979; 45 years ago (1979) in San Francisco Bay Area, California, United States
Founders
Defunct1989 (1989)
FateAcquired by Tata Group
SuccessorTata Elxsi

Elxsi Corporation was a minicomputer manufacturing company established in the late 1970s in Silicon Valley, US, along with a host of competitors (Trilogy Systems, Sequent, Convex Computer). The Elxsi processor was an Emitter Coupled Logic (ECL) design that featured a 50-nanosecond clock, a 25-nanosecond back panel bus, IEEE floating-point arithmetic and a 64-bit architecture. It allowed multiple processors to communicate over a common bus called the Gigabus, believed to be the first company to do so. The operating system was a message-based operating system called EMBOS. The Elxsi CPU was a microcoded design, allowing custom instructions to be coded into microcode.

History

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Elxsi was founded in 1979 by Joe Rizzi (previously a manager at Intersil) and Thampy Thomas (who would go on to found NexGen Microsystems). It is believed that Elxsi was the first startup founded by an Indian in Silicon Valley. Much of the architecture of the Elxsi machine was designed by former Stanford University professors Len Shar and Balasubrimanian Kumar. Another key contributor to the design was Harold (Mac) McFarland, who was also a key designer on the team that created the PDP-11. George Taylor (on the IEEE standard committee and a student of UC Berkeley Professor William Kahan) provided a key design for the IEEE floating-point unit.

Elxsi was bought out by Gene Amdahl in 1985 with money that was leftover from the Trilogy venture. Venture investors in Elxsi included Tata Group (India) and Arthur Rock. In 1989, however, Elxsi left the computer business because of the general shift away from the use of mainframes in the global computer industry and the advent of the personal computer. The Tata Group kept the name Tata Elxsi but it now belongs to the Tata group of companies.

The original Elxsi Corporation, however, remained in business as a going concern. In 1989, the company sold its computer maintenance business to National Computer Systems. In 1991, the company entered two entirely different lines of business: restaurants and sewer inspection equipment.[1] ELXSI is still engaged in these businesses, as well as its CUES unit, which makes video pipeline inspection equipment.

Before its withdrawal from the computer industry, the large range of hardware expansion gave the machine some success in departmental technical computing environments. The 64-bit registers and ability to do parallel adds within them gave it an unanticipated advantage in COBOL benchmarks, where it outperformed some mainframes. And the extreme independence of the CPUs (lack of cache snooping and invalidation), coupled with the ability to lock processes into register sets and later, the ability to partition the caches, gave it some success in real-time applications.

Hardware

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The machine was a mini-supercomputer: a category of computers that was larger than a VAX 11/780 and smaller than a mainframe. This market segment disappeared as high-end microprocessor-based systems became more powerful.

The architecture was unusual, especially for its day. The system bus connected as many as 12 CPUs and I/O processors. Each CPU was built from three large boards of ECL gate arrays. Key elements of its instruction set architecture were:

  • 16 registers (64-bit)
  • 32-bit linear address space (64-bit integers but 32-bit pointers)
  • Multiple register sets per processor, with switches among processes loaded into register sets handled by microcode
  • Small set of basic addressing modes
  • Small set of instruction lengths, length determinable from first few nibbles of instruction
  • No hardware cache coherence among processors
  • Microcoded message system to communicate among software processes and with I/O controllers and CPU microcode
  • No supervisor mode—equivalent restrictions applied by controlling which processes held special message system communication links and which virtual address space had the memory management tables mapped into it
  • Multiple hardware CPU interrupts that supported real-time computing applications (e.g., flight simulators and industrial process controllers)
  • Two generations of CPU were sold and a third developed but never sold. All plugged into the same backplane and could be intermixed in a single system.

Software

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The EMBOS OS was written entirely from scratch in a slightly extended Pascal. It was a multi-server architecture (like GNU Hurd, but long predating that project). The UI was Unix-like, especially at the shell level, with similar concepts but different commands, syntax, etc. (e.g. "files" instead of "ls"; "find" instead of "grep"). Later, a Unix kernel was hosted on top of the lower-level servers so that EMBOS and Unix processes and users could co-exist (ENIX). VMS compatibility software running on top of EMBOS was also added to ease porting of VAX applications.

Notable employees

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References

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  1. ^ Kuhn, Brad (26 June 1995). "ELXSI Focuses On Odd Mix". Orlando Sentinel. Retrieved 21 March 2014.
  2. ^ "Inventing Itanium: How HP Labs Helped Create the Next-Generation Chip Architecture". HP. June 2001. Archived from the original on July 5, 2023.
Notes
  • John Sanguinetti and B. Kumar, "Performance of a Message-Based Multi-Processor," Proceedings of the 12th International Symposium on Computer Architecture (12th ISCA'85), IEEE, Boston, MA, June 1985, pp. 424–425.
  • Gary R. Montry and Robert E. Benner, "Parallel Processing on an ELXSI 6400," Second International Conference on Supercomputing, Proceedings, Supercomputing '87, Industrial Supercomputer Applications and Computations, vol. II, International Supercomputing Institute, Inc., 1987, pp. 64–71.
  • Robert Olson, "Parallel processing in a message-based operating system," IEEE Software, vol. 2, 4, July 1985, pp. 39–49.
  • George S. Taylor, "Arithmetic on the Elxsi System 6400", Proceedings of the IEEE Sixth Symposium on Computer Arithmetic ( 1983), IEEE Computer Society, pp. 110–115,
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