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Digital clock manager

From Wikipedia, the free encyclopedia

A digital clock manager (DCM) is an electronic component available on some field-programmable gate arrays (FPGAs) (notably ones produced by Xilinx). A digital clock manager is useful for manipulating clock signals inside the FPGA, and to avoid clock skew which would introduce errors in the circuit.

Uses

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Digital clock managers have the following applications:[1]

  • Multiplying or dividing an incoming clock (which can come from outside the FPGA or from a Digital Frequency Synthesizer [DFS][citation needed]).
  • Making sure the clock has a steady duty cycle.
  • Adding a phase shift with the additional use of a delay-locked loop.
  • Eliminating clock skew within an FPGA design.

See also

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References

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  1. ^ "Using Digital Clock Managers (DCMs) in Spartan-3 FPGAs". xilinx.com