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Bijan Davari

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Bijan Davari
Born
Tehran, Iran
CitizenshipAmerican (formerly Iranian)
EducationPh.D.
Engineering career
DisciplineComputer Engineering
InstitutionsRPI, IBM
Employer(s)IBM
ProjectsCMOS-5X, IBM RoadRunner,
Significant advanceCMOS, STI
AwardsIBM Fellow, J J Ebers Award, IEEE Andrew S. Grove Award, National Academy of Engineering

Bijan Davari (Persian: بیژن داوری) is an Iranian-American electrical engineer. He is an IBM Fellow and Vice President at IBM Thomas J Watson Research Center, Yorktown Hts, NY. His pioneering work in the miniaturization of semiconductor devices changed the world of computing.[1] His research led to the first generation of voltage-scaled deep-submicron CMOS with sufficient performance to totally replace bipolar technology in IBM mainframes and enable new high-performance UNIX servers. As head of IBM’s Semiconductor Research Center (SRDC), he led IBM into the use of Copper interconnect, silicon on insulator (SOI), and Embedded DRAM before its rivals. [2] He is a member of the U.S. National Academy of Engineering[3] and is known for his seminal contributions to the field of CMOS technology. He is an IEEE Fellow, recipient of the J J Ebers Award in 2005[4] and IEEE Andrew S. Grove Award in 2010.[5] At the present time, he leads the Next Generation Systems Area of research.

Education

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Bijan Davari was born in Tehran, Iran, in 1954.[6] He received his bachelor's degree in electrical engineering from Sharif University of Technology, Tehran, Iran, and his master's degree from Rensselaer Polytechnic Institute (RPI). He received his doctorate from RPI in electrical engineering as well with a thesis on the interface behavior of semiconductor devices, and joined IBM Thomas J Watson Research Center in 1984.

Technical achievements

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At IBM, Dr. Davari worked on ways to improve MOSFET (metal–oxide–semiconductor field-effect transistor)[7] and CMOS (complementary metal–oxide–semiconductor) technology,[8] which provides the basis for much of today's semiconductor processing. In 1985, Davari began the task of defining IBM's next generation of CMOS integrated circuits, which came to be called CMOS-5X. He led the research efforts that produced the first generation of high-performance, low voltage deep submicron CMOS technology. CMOS-5X served as the basis for the PowerPC® 601+ and several other microprocessors, including those used in IBM System/390 servers.[9]

Dr. Davari defined the roadmap for technology and voltage scaling for IBM[10] which influenced the CMOS roadmap for the industry down to 70 nm regime. This technology led to several generations of high-performance, low-voltage and low-power CMOS technologies that enabled servers, portable computers and battery powered handheld devices.

Dr. Davari and his team at IBM also demonstrated the first shallow trench isolation (STI) process.[11] STI helps prevent electrical current leakage between semiconductor devices on an integrated circuit. STI process was first used in IBM's 0.5-micrometer technology node for high-performance CMOS logic and in 16-Megabit dynamic RAM. It was eventually used widely throughout the industry.[12]

In 1987, Dr. Davari led an IBM research team that demonstrated the first MOSFET with 10 nanometer gate oxide thickness, using tungsten-gate technology.[7] In 1988, he led an IBM team that demonstrated high-performance dual-gate CMOS devices with 180 nm to 250 nm channel lengths.[8][13]

In 1998, Dr. Davari was appointed as the Vice President in charge of IBM’s Semiconductor Research Center (SRDC). In this role he is credited with leading IBM to become a pioneer in the use of Copper Interconnect, silicon on insulator (SOI), and Embedded DRAM. SRDC attracted many industry partners, including semiconductor manufacturers, tools vendors, material suppliers, and chip design houses. The users included the big three in gaming chips Sony, Nintendo, and Microsoft’s Xbox--along with Apple for their Mac offerings and AMD. This gave IBM the economy of scale and powerful financial recoveries to sustain and expand its leadership in Semiconductor technology. [14][15][16]

Dr. Davari was one of the leaders in the Cell Broadband Engine work at IBM, which was used to build the first Cell-based supercomputer, IBM Roadrunner. In 2008, the Roadrunner supercomputer was the first to break the petaflop barrier,[17] reaching a processing speed of 1.026 petaflops.[18]

Selected awards and honors

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References

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  1. ^ "Honor Roll: Bijan Davari". IT History Society. 21 December 2015.
  2. ^ "IBM Micro's reshuffle taps Davari for new position". EE Times. 6 August 2003.
  3. ^ "Citation for Bijan Davari".
  4. ^ IEEE. "Past J.J. Ebers Award winners". IEEE. Archived from the original on 2012-03-16. Retrieved 2016-09-27.
  5. ^ IEEE. "Andrew Grove Award Winners List". Institute of Electrical and Electronics Engineers (IEEE). Archived from the original on April 7, 2010.
  6. ^ "Game Changers". IBM Systems Journal. Archived from the original on 2013-03-12. Retrieved 2016-09-27.
  7. ^ a b Davari, Bijan; Ting, Chung-Yu; Ahn, Kie Y.; Basavaiah, S.; Hu, Chao-Kun; Taur, Yuan; Wordeman, Matthew R.; Aboelfotoh, O. (1987). "Submicron Tungsten Gate MOSFET with 10 nm Gate Oxide". 1987 Symposium on VLSI Technology. Digest of Technical Papers: 61–62.
  8. ^ a b Davari, Bijan; et al. (1988). "A high performance 0.25 mu m CMOS technology". Technical Digest., International Electron Devices Meeting. pp. 56–59. doi:10.1109/IEDM.1988.32749. S2CID 114078857. {{cite book}}: |journal= ignored (help)
  9. ^ "Bijan Davari". Profile of Iranian Scientists.
  10. ^ Davari, Bijan; et al. (April 1995). "CMOS Scaling for High Performance and Low Power - the Next Ten Years" (PDF). Proceedings of the IEEE. 83 (4): 595–606. doi:10.1109/5.371968.
  11. ^ Davari, Bijan; et al. (1988). "A Variable-size Shallow Trench Isolation technology with diffused sidewall doping for submicron CMOS". IEDM.
  12. ^ "Bijan Davari, Strategic Technology Leader, to Receive 2010 IEEE Andrew S. Grove Award" (PDF). IEEE Press Release. 23 November 2010. Archived from the original (PDF) on 20 December 2016. Retrieved 28 September 2016.
  13. ^ Davari, Bijan; Wong, C. Y.; Sun, Jack Yuan-Chen; Taur, Yuan (December 1988). "Doping of n/Sup +/ And p/Sup +/ Polysilicon in a dual-gate CMOS process". Technical Digest., International Electron Devices Meeting. pp. 238–241. doi:10.1109/IEDM.1988.32800. S2CID 113918637.
  14. ^ "IBM, Sony, Toshiba to develop advanced IC processes, including SOI". EE Times. 2 April 2002.
  15. ^ IBM Annual Report (Report). IBM Corporation. 1997.
  16. ^ "AMD and IBM to Jointly Develop Advanced Chip Technologies". AMD Press. 8 January 2003.
  17. ^ "List of top 500 SuperComputers". top500.org. June 2008.
  18. ^ IBM (7 March 2012). "The Cell Broadband Engine". History of IBM. IBM. Archived from the original on April 3, 2012.
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