Talk:Small outline integrated circuit
| This is the talk page for discussing improvements to the Small outline integrated circuit article. This is not a forum for general discussion of the article's subject. |
Article policies
|
| Find sources: Google (books · news · scholar · free images · WP refs) · FENS · JSTOR · TWL |
 | This article is rated Start-class on Wikipedia's content assessment scale. It is of interest to the following WikiProjects: | ||||||||||
| |||||||||||
Comprehensive Table
[edit]It would be nice if there was a single table with dimensions. Something like this:
| Package | WB | WL | H | C | L | P | LL | T | LW | O | Note |
|---|---|---|---|---|---|---|---|---|---|---|---|
| SOIC-8-N | 3.8–4.0 | 5.8–6.2 | 1.35–1.75 | 0.10–0.25 | 4.8–5.0 | 1.27 | 0.41 (1.04) | 0.19–0.25 | 0.35–0.51 | 0.33 | |
| SOIC-14-N | 3.8–4.0 | 5.8–6.2 | 1.35–1.75 | 0.10–0.25 | 8.55–8.75 | 1.27 | 1.05 | 0.19–0.25 | 0.39–0.46 | 0.3–0.7 | |
| SOIC-16-N | 3.8–4.0 | 5.8–6.2 | 1.35–1.75 | 0.10–0.25 | 9.8–10.0 | 1.27 | 1.05 | 0.19–0.25 | 0.39–0.46 | 0.3–0.7 | |
| SOIC-16-W | 7.4–7.6 | 10.0–10.65 | 2.35–2.65 | 0.10–0.30 | 10.1–10.5 | 1.27 | 0.40–1.27 | 0.20–0.33 | 0.31–0.51 | 0.4–0.9 | This is the "wide" 0.300" width version. |
| SOIC_xW | 5.16,5.41 | 7.67,8.07 | 1.27 | ||||||||
| SOJ | 1.27 | ||||||||||
| SOP-8 | 3.9 | 6.0 | 1.55 | 0.175 | 1.27 | 0.42 | |||||
| SSOP-16 | 4.4 | 6.4 | 1.33 | 0.1 | 0.65 | 0.22 | |||||
| MSOP-8 | 3.0 | 5.0 | 0.95 | 0.1 | 0.65 | ||||||
| MSOP-10 | 3.0 | 5.0 | 0.95 | 0.1 | 0.5 | ||||||
| TSOP[I]-28 | 11.8 | 13.4 | 1.2 | 0.1 | 0.55 | 0.22 | Type I is wider than long | ||||
| TSOP[II]-28 | 10.16 | 11.76 | 1.2 | 0.1 | 1.27 | 0.42 | |||||
| TSSOP (8-28 pins) | 4.4 | 6.4 | 1.0 | 0.1 | .65 | When there are more than 28 pins, pitch changes | |||||
| VSSOP | 2.3 | 3.1 | 0.775 | 0.075 | 0.5 |
Many of these came from LSI's page[1]. I don't know how manufacturer specific they are. Since dimensions, including pitch, can change based on pin count, it could have all variants, or one which is representative of the class.Ryanneve (talk) 16:33, 13 March 2015 (UTC)
narrower comment
[edit]i'm 99% sure the 28 pin soic that microchip supply pics in is actually wider than the 28 pin skinny dip they supply the same chips in. Is this standard or a peculiarity of pics? Plugwash 09:41, 2 April 2006 (UTC)
- Sadly, I am familiar with this. It seems SOIC for most manufacturers only defines pin thickness and pitch. So on one of my boards, our footprint was too wide on one SOIC, and too narrow on another. Luckily it was a low speed signal, so our QA folks were kind enough to rig it to work since it was only a prototype... — RevRagnarok Talk Contrib 20:16, 4 December 2006 (UTC)
Authoritative source
[edit]Where is an authoritative source for information about electronics package outlines, form factors, etc.? JEDEC would be one. Are there others? I know that certain package types have several names, probably depending on manufacturer. The subject is much more complicated today than 20 years ago. There are so many package families, and each has so many variants. --HelgeStenstrom 09:23, 18 August 2006 (UTC)
- The relevant JEDEC publication is JEP95. The 1.27mm pitch packages described in there are MS-012, MS-013, MO-119, and MO-120.
- For the same pitch EIAJ (now JEITA) released the report EDR-7320 which defines parameters for packages with nominal WL of 225mil, 300mil, 375mil, 450mil, 525mil, and 600mil. EIAJ calls these packages SOP. A list of standardized combinations of the parameters is given in ED-7311-19, but the commonly found 8 pin package with square 5.3mm body (f.ex. for SPI flashes) is not in there.
- IPC sums it all up in IPC-SM-782, where they list the JEDEC SOIC packages in section 9.1 and the EIAJ SOP packages (sometimes called SOPIC) in section 9.3. 77.20.125.112 (talk) 10:25, 29 March 2013 (UTC)
EDA Symbols
[edit]Is there any way to post package footprints for EDA software here? It would be great to have all Wikipedia pages on chip packages have footprints for Orcad/Protel/Eagle etc.
-David
- I don't think that would really meet the objectives of WP; it's not supposed to be a symbol library repository. :) And I know I have been stuck drawing enough OrCAD symbols to tell you that they're just too individualized. — RevRagnarok Talk Contrib 20:18, 4 December 2006 (UTC)
Technology
[edit]Is SOIC a SMT? --Abdull 18:57, 21 November 2006 (UTC)
- Yes. The gull wing in the illustration does not go through the PCB. — RevRagnarok Talk Contrib 20:12, 4 December 2006 (UTC)
- If SMT = surface mount technology,
- including "mounting" on a board, used materials, the how to do it, i.e. the "whole world",
- and SMD = surface mount(ed) devices,
- are the little "things" we use to place on a surface of a ...
- I would recommend, talking about "SMD" when in relation to the housing of the devices, and components for that technology?
- Reminder: there are some SMDs, which need a cutout of the PCB, e.g. some micro USB sockets - but their pins still stay on/above the (bottom) copper side.
- The "legacy", the old view of a 1-layer PCB (in THT - through hole technology) has the pins of a device or component on the top of the PCB, e.g. a axial resistor, a through hole LED, going through the PCB by a small hole (eg. 0.8mm), also through the (1-sided) copper layer on the bottom from where it will be soldered.
- Of course, with two-sided (copper) PCBs or multi-layer boards, this kind of view and it's criteria vanish. 2003:EE:9F03:3A49:EEF4:BBFF:FE61:4310 (talk) 08:53, 24 November 2022 (UTC)
NSOIC
[edit]What is the NSOIC package? -Marcus
NARROW SMALL OUTLINE PACKAGE — Preceding unsigned comment added by 117.218.250.241 (talk) 05:16, 26 January 2015 (UTC)
Looks to be the same as SOP at least in 8 pin package.Ryanneve (talk) 16:33, 13 March 2015 (UTC)
Units
[edit]What are the units for the table of dimensions? Orpheus (talk) 03:10, 5 May 2011 (UTC)
Can someone answer this person's question? I don't know how many fields I've had to deal with that seem to think people already know something "incredibly obvious". — Preceding unsigned comment added by 50.37.97.68 (talk) 14:32, 31 December 2022 (UTC)
HSOP
[edit]Hey, Perhaps this article can include some information about HSOP http://cache.freescale.com/files/analog/doc/app_note/AN2388.pdf packages since its not available anywhere. They are basically soics with a heat sink at the bottom. MC33887 is an example. Shall i include it or? Malithyapa (talk) 07:29, 30 June 2011 (UTC) There's also HTSSOP. Perhaps a section on prefixes?Ryanneve (talk) 16:33, 13 March 2015 (UTC)
SOP pitch
[edit]According to the Texas Instruments package guide, SOP (and SOT) have 1.27mm pitch pins. Only the TSOP and SSOP variants are 0.635mm. This should be verified and written more clearly. The current SOP section is misleading. --Onitake (talk) 12:44, 10 June 2013 (UTC)
SSOP pitch is 0.65mm (0.0256 inches). TSSOP, VSSOP and MSOP pitches are 0.65mm or 0.5mm.S-Ene (talk) 11:37, 17 March 2015 (UTC)
The SOP section was quite wrong, or at least not at all in line with common vendor terminology. TI uses "SOP" to refer to JEITA/EIAJ packages with 1.27 mm pitch and 5.3 mm body width, to distinguish them from the JEDEC 1.27 mm pitch and 3.9 or 7.5 mm body width, which they call SOIC. I've also got a Fairchild data sheet here that is the same. So I've dug up the standards and made some major alterations to "SOIC" section to follow that terminology, and removed "SOP" from the "smaller devices" bit. Clearly further use of the term SOP in any different way should come with references. Cjs (talk) 08:28, 2 June 2020 (UTC)
Pin Numbering
[edit]Please would someone add details on pin numbering ? How to determine which is pin 1 relative to the bevelled side ? Many thanks ! Darkman101 (talk) 08:48, 24 December 2013 (UTC)
- IMHO the best advice is "please refer to the datasheet" of the manufacturer of that part, this is the only solid base (and their also published errata) - but if you do not find the information there, they often have more general datasheets, too, which are about more common topics, about things which are common to the family/series of chips etc. - I often had to realize, that catalogues, reprints or third party's web pages are highly error-prone...
- Most often used of course is, for a dual-in-line (DIL/DIP), rectangular package:
- - view from the top of the part,
- - pins to the ground, as you would place it onto the backing layer
- - you can read the imprint, upright,
- - one line of pins on the north,
- - the other on the south side, maybe bevelled side,
- ] a notch at the west side,
- - a small hole or dot, a mark, a triangle/arrow
- - in the south-west (lower-left) corner
- o starting with #1 there
- ---> ongoing to the right, numbered ccw
- - go on counting on the north side from right to left <---
8 7 6 5 <----------------] My ICxyz |-o-----------1 2 3 4 --->- ! If you have a PCB with through hole parts (on the top side) AND surface mount devices (on the "bottom" side) - the onscreen layouts will show the reverted ccw numbering (into cw direction) for parts from the opposite side - cause "ccw" is always seen from the top of the device, the component, with the pins to it's copper layer (top or bottom of the pcb)
- ! Also adapter boards may result in a different enumeration of the original pins. 2003:EE:9F03:3A49:EEF4:BBFF:FE61:4310 (talk) 10:19, 24 November 2022 (UTC)
MSOP is missing
[edit]This page shows examples of MSOP archived MSOP specs.
But note that the example given for MSOP-8 is not accurate in all cases. The datasheet for Microchip MCP453X/455X/463X/465X shows a MSOP-8 package with pitch of 0.65 mm and a bodywidth of 3 mm x 3 mm. So there is some variability there between manufacturers. MSOP may need it's own page, as other form factors appear to have. --Cosmicray (talk) 21:54, 10 January 2015 (UTC)
The "National Semiconductor Selection Guide by Package Products" reference do not exist anymore. Maybe it should be substiruted with somehting like http://www.ti.com/sc/docs/package/guide.htm?keyMatch=selection%20guide%20package ? — Preceding unsigned comment added by Jpsecher (talk • contribs) 06:46, 19 September 2015 (UTC)