Library Exchange Format
(Redirected from Layout Extraction Format)
In integrated circuit design, Library Exchange Format (LEF) is a specification for representing the physical layout of an integrated circuit in an ASCII format. It includes design rules and abstract information about the standard cells.[1] [2]
LEF only has the basic information required at that level to serve the purpose of the concerned CAD tool. It helps in saving valuable resources by providing only an abstract view and thus consuming less memory overhead. LEF is used in conjunction with Design Exchange Format (DEF) to represent the complete physical layout of an integrated circuit while it is being designed.
LEF originated by Tangent for their Place and Route (P&R) tools, which were bought by Cadence Design Systems.[3]
References
[edit]- ^ "Library Exchange Format" (PDF). University of Maryland, Baltimore County. Retrieved 2011-05-14.
- ^ "LEF/DEF Reference" (PDF). Cadence Design Systems, Inc. Archived from the original (PDF) on 2018-10-31. Retrieved 2018-10-31.
- ^ Smith, Michael J. S., Application-Specific Integrated Circuits, Addison-Wesley, 1997, page 897.