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File:X86 Paging PAE 2M.svg

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Summary

Description
Deutsch: Schematische Darstellung der Umsetzung von linearen in physische Adressen bei x86-kompatiblen CPUs im 32-Bit Protected Mode. Seitengröße: 2 MiByte, mit PAE.
English: Schematic drawing of translation of linear to physical addresses in 32 bit protected mode. Page size: 2 MiByte, PAE enabled
Date
Source Own work using: Xfig
Author RokerHRO
Other versions See http://roker.dingens.org/wikipedia/fig/ for original .fig file.

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20 March 2008

File history

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Date/TimeThumbnailDimensionsUserComment
current13:07, 1 October 2009Thumbnail for version as of 13:07, 1 October 2009612 × 378 (27 KB)A5b
12:03, 28 October 2008Thumbnail for version as of 12:03, 28 October 2008612 × 378 (27 KB)Marcos vicente{{Information |Description= |Source= |Date= |Author= |Permission= |other_versions= }}
11:48, 20 March 2008Thumbnail for version as of 11:48, 20 March 2008612 × 378 (17 KB)RokerHRO{{Information |Description={{de|Schematische Darstellung der Umsetzung von linearen in physische Adressen bei x86-kompatiblen CPUs im 32-Bit Protected Mode. Seitengröße: 2 MiByte, mit PAE.}} {{en|Schematic drawing of translation of linear to physical ad

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