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File:X86 Paging 4M.svg

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Summary

Description
Deutsch: Schematische Darstellung der Umsetzung von linearen in physische Adressen bei x86-kompatiblen CPUs im 32-Bit Protected Mode. Seitengröße: 4 MiByte, kein PAE.
English: Schematic drawing of translation of linear to physical addresses in 32 bit protected mode. Page size: 4 MiByte, no PAE
Date
Source Own work using: Xfig
Author RokerHRO
Other versions See http://roker.dingens.org/wikipedia/fig/ for original .fig file.

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20 March 2008

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Date/TimeThumbnailDimensionsUserComment
current11:46, 20 March 2008Thumbnail for version as of 11:46, 20 March 2008567 × 405 (14 KB)RokerHRO{{Information |Description={{de|Schematische Darstellung der Umsetzung von linearen in physische Adressen bei x86-kompatiblen CPUs im 32-Bit Protected Mode. Seitengröße: 4 MiByte, kein PAE.}} {{en|Schematic drawing of translation of linear to physical a

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