File:Schematic of silicon nanowire (5887830244).jpg
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Summary
| Description |
In this schematic image, a silicon nanowire is shown surrounded by a stack of thin layers of material called dielectrics, which store electrical charge. NIST scientists determined the best arrangement for this dielectric stack for the optimal construction of silicon nanowire-based memory devices. See also www.nist.gov/pml/semiconductor/nanowire-052411.cfm. Credit: Zhu, GMU Disclaimer: Any mention of commercial products within NIST web pages is for information only; it does not imply recommendation or endorsement by NIST. Use of NIST Information: These World Wide Web pages are provided as a public service by the National Institute of Standards and Technology (NIST). With the exception of material marked as copyrighted, information presented on these pages is considered public information and may be distributed or copied. Use of appropriate byline/photo/image credits is requested. |
| Date | |
| Source | Schematic of silicon nanowire |
| Author | National Institute of Standards and Technology |
Licensing
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This image is in the public domain in the United States because it is a work of the United States Federal Government, specifically an employee of the National Institute of Standards and Technology, under the terms of Title 17, Chapter 1, Section 105 of the US Code.
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This image was originally posted to Flickr by National Institute of Standards and Technology at https://flickr.com/photos/63059536@N06/5887830244. It was reviewed on 7 September 2016 by FlickreviewR and was confirmed to be licensed under the terms of the United States Government Work. |
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 02:28, 7 September 2016 | | 2,052 × 1,200 (494 KB) | Vanished Account Byeznhpyxeuztibuo | Transferred from Flickr via Flickr2Commons |
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