Communications Processor Module
| POWER, PowerPC, and Power ISA architectures |
|---|
| NXP (formerly Freescale and Motorola) |
| IBM |
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| IBM/Nintendo |
| Other |
| Related links |
| Cancelled in gray, historic in italic |
Communications Processor Module (CPM) is a component of Motorola 68000 family (QUICC) or Motorola/Freescale Semiconductor PowerPC/Power ISA (PowerQUICC) microprocessors designed to provide features related to imaging and communications. A microprocessor can delegate most of the input/output processing (for example sending and receiving data via the serial interface) to the Communications Processor Module and the microprocessor does not have to perform those functions itself. Some input/output functions require quick response from the processor, for example due to precise timing requirements during data transmission. With CPM performing those operations, the main microprocessor is free to perform other tasks.
The CPM features its own RISC microcontroller (Communication Processor), separate from the actual central processing unit IP core. The RISC microcontroller communicates with the core using dual-ported RAM, special command, configuration and event registers as well as via interrupts.
Motorola 68302 Integrated Multiprotocol Processor featured a RISC processor[1] controlled either by a microcode in ROM or by downloadable firmware. Various forms of microcode were shipped for different applications, for example to support Signaling System 7 communications or Centronics parallel interface. Motorola 68360 QUICC was the first design to feature Communications Processor Module, offering microcode for SS7 and ISDN applications. Specifications of the microcontroller programming interface were generally not shipped to customers.[2][3] It was possible to run 68360 in slave mode and to use only CPM part of the chip, for example in the M68360QUADS-040 board, where 68040 CPU (master) is coupled with 68360 CPM (slave), with CPU of 68360 processor being disabled.[4]
CPM was used later in the PowerQUICC series of PowerPC- and Power ISA-based processors. Early designs, like MPC860, used virtually the same CPM as the previous 68360 QUICC processors.[5]
Typical features of the CPM include:
- Medium access control (MAC),
- Communication interfaces with serial communication controllers (SCC), serial management controllers (SMC), Universal Serial Bus, I²C and Serial Peripheral Interface Bus attachment,
- Direct memory access (DMA) circuitry, interrupt controller, time-slot assigner and baud rate generators.
Notes
[edit]- ^ MC68302 Integrated Multiprotocol Processor User's Manual, section 4, 1995.
- ^ Freescale FAQ 8733: Where can I get the programming manuals and development systems for the RISC Communications Processor that is inside the 68360?[permanent dead link], June 1995
- ^ CPM Microcode FAQ, DoGav Systems Ltd.
- ^ M68360QUADS-040 User's Manual, 1997
- ^ Freescale Application Note AN2051 Porting Code from MC68360 to MPC860, 1996
References
[edit]- Freescale Semiconductor MC68360 QUad Integrated Communications Controller User's Manual, 1995.
- Freescale Semiconductor PowerPC MPC823 Reference Manual, revision 1, section 1.2.3 Communication Processor Module, page 1–9, 2000.
- Freescale Semiconductor Application Note 2045: CPM/CPU Interaction
- Freescale Semiconductor Application Note 2050: QUICC/PowerQUICC Differences