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Cyclic redundancy check

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A cyclic redundancy check (CRC) is an error-detecting code commonly used in digital networks and storage devices to detect accidental changes to digital data.[1][2] Blocks of data entering these systems get a short check value attached, based on the remainder of a polynomial division of their contents. On retrieval, the calculation is repeated and, in the event the check values do not match, corrective action can be taken against data corruption. CRCs can be used for error correction (see bitfilters).[3]

CRCs are so called because the check (data verification) value is a redundancy (it expands the message without adding information) and the algorithm is based on cyclic codes. CRCs are popular because they are simple to implement in binary hardware, easy to analyze mathematically, and particularly good at detecting common errors caused by noise in transmission channels. Because the check value has a fixed length, the function that generates it is occasionally used as a hash function.

Introduction

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CRCs are based on the theory of cyclic error-correcting codes. The use of systematic cyclic codes, which encode messages by adding a fixed-length check value, for the purpose of error detection in communication networks, was first proposed by W. Wesley Peterson in 1961.[4] Cyclic codes are not only simple to implement but have the benefit of being particularly well suited for the detection of burst errors: contiguous sequences of erroneous data symbols in messages. This is important because burst errors are common transmission errors in many communication channels, including magnetic and optical storage devices. Typically an n-bit CRC applied to a data block of arbitrary length will detect any single error burst not longer than n bits, and the fraction of all longer error bursts that it will detect is approximately (1 − 2n).

Specification of a CRC code requires definition of a so-called generator polynomial. This polynomial becomes the divisor in a polynomial long division, which takes the message as the dividend and in which the quotient is discarded and the remainder becomes the result. The important caveat is that the polynomial coefficients are calculated according to the arithmetic of a finite field, so the addition operation can always be performed bitwise-parallel (there is no carry between digits).

In practice, all commonly used CRCs employ the finite field of two elements, GF(2). The two elements are usually called 0 and 1, comfortably matching computer architecture.

A CRC is called an n-bit CRC when its check value is n bits long. For a given n, multiple CRCs are possible, each with a different polynomial. Such a polynomial has highest degree n, which means it has n + 1 terms. In other words, the polynomial has a length of n + 1; its encoding requires n + 1 bits. Note that most polynomial specifications either drop the MSb or LSb, since they are always 1. The CRC and associated polynomial typically have a name of the form CRC-n-XXX as in the table below.

The simplest error-detection system, the parity bit, is in fact a 1-bit CRC: it uses the generator polynomial x + 1 (two terms),[5] and has the name CRC-1.

Application

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A CRC-enabled device calculates a short, fixed-length binary sequence, known as the check value or CRC, for each block of data to be sent or stored and appends it to the data, forming a codeword.

When a codeword is received or read, the device either compares its check value with one freshly calculated from the data block, or equivalently, performs a CRC on the whole codeword and compares the resulting check value with an expected residue constant.

If the CRC values do not match, then the block contains a data error.

The device may take corrective action, such as rereading the block or requesting that it be sent again. Otherwise, the data is assumed to be error-free (though, with some small probability, it may contain undetected errors; this is inherent in the nature of error-checking).[6]

Data integrity

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CRCs are specifically designed to protect against common types of errors on communication channels, where they can provide quick and reasonable assurance of the integrity of messages delivered. However, they are not suitable for protecting against intentional alteration of data.

Firstly, as there is no authentication, an attacker can edit a message and recompute the CRC without the substitution being detected. When stored alongside the data, CRCs and cryptographic hash functions by themselves do not protect against intentional modification of data. Any application that requires protection against such attacks must use cryptographic authentication mechanisms, such as message authentication codes or digital signatures (which are commonly based on cryptographic hash functions).

Secondly, unlike cryptographic hash functions, CRC is an easily reversible function, which makes it unsuitable for use in digital signatures.[7]

Thirdly, CRC satisfies a relation similar to that of a linear function (or more accurately, an affine function):[8]

where depends on the length of and . This can be also stated as follows, where , and have the same length

as a result, even if the CRC is encrypted with a stream cipher that uses XOR as its combining operation (or mode of block cipher which effectively turns it into a stream cipher, such as OFB or CFB), both the message and the associated CRC can be manipulated without knowledge of the encryption key; this was one of the well-known design flaws of the Wired Equivalent Privacy (WEP) protocol.[9]

Computation

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To compute an n-bit binary CRC, line the bits representing the input in a row, and position the (n + 1)-bit pattern representing the CRC's divisor (called a "polynomial") underneath the left end of the row.

In this example, we shall encode 14 bits of message with a 3-bit CRC, with a polynomial x3 + x + 1. The polynomial is written in binary as the coefficients; a 3rd-degree polynomial has 4 coefficients (1x3 + 0x2 + 1x + 1). In this case, the coefficients are 1, 0, 1 and 1. The result of the calculation is 3 bits long, which is why it is called a 3-bit CRC. However, you need 4 bits to explicitly state the polynomial.

Start with the message to be encoded:

11010011101100

This is first padded with zeros corresponding to the bit length n of the CRC. This is done so that the resulting code word is in systematic form. Here is the first calculation for computing a 3-bit CRC:

11010011101100 000 <--- input right padded by 3 bits
1011               <--- divisor (4 bits) = x³ + x + 1
------------------
01100011101100 000 <--- result

The algorithm acts on the bits directly above the divisor in each step. The result for that iteration is the bitwise XOR of the polynomial divisor with the bits above it. The bits not above the divisor are simply copied directly below for that step. The divisor is then shifted right to align with the highest remaining 1 bit in the input, and the process is repeated until the divisor reaches the right-hand end of the input row. Here is the entire calculation:

11010011101100 000 <--- input right padded by 3 bits
1011               <--- divisor
01100011101100 000 <--- result (note the first four bits are the XOR with the divisor beneath, the rest of the bits are unchanged)
 1011              <--- divisor ...
00111011101100 000
  1011
00010111101100 000
   1011
00000001101100 000 <--- note that the divisor moves over to align with the next 1 in the dividend (since quotient for that step was zero)
       1011             (in other words, it doesn't necessarily move one bit per iteration)
00000000110100 000
        1011
00000000011000 000
         1011
00000000001110 000
          1011
00000000000101 000
           101 1
-----------------
00000000000000 100 <--- remainder (3 bits).  Division algorithm stops here as dividend is equal to zero.

Since the leftmost divisor bit zeroed every input bit it touched, when this process ends the only bits in the input row that can be nonzero are the n bits at the right-hand end of the row. These n bits are the remainder of the division step, and will also be the value of the CRC function (unless the chosen CRC specification calls for some postprocessing).

The validity of a received message can easily be verified by performing the above calculation again, this time with the check value added instead of zeroes. The remainder should equal zero if there are no detectable errors.

11010011101100 100 <--- input with check value
1011               <--- divisor
01100011101100 100 <--- result
 1011              <--- divisor ...
00111011101100 100

......

00000000001110 100
          1011
00000000000101 100
           101 1
------------------
00000000000000 000 <--- remainder

The following Python code outlines a function which will return the initial CRC remainder for a chosen input and polynomial, with either 1 or 0 as the initial padding. Note that this code works with string inputs rather than raw numbers:

def crc_remainder(input_bitstring, polynomial_bitstring, initial_filler):
    """Calculate the CRC remainder of a string of bits using a chosen polynomial.
    initial_filler should be '1' or '0'.
    """
    polynomial_bitstring = polynomial_bitstring.lstrip('0')
    len_input = len(input_bitstring)
    initial_padding = (len(polynomial_bitstring) - 1) * initial_filler
    input_padded_array = list(input_bitstring + initial_padding)
    while '1' in input_padded_array[:len_input]:
        cur_shift = input_padded_array.index('1')
        for i in range(len(polynomial_bitstring)):
            input_padded_array[cur_shift + i] \
            = str(int(polynomial_bitstring[i] != input_padded_array[cur_shift + i]))
    return ''.join(input_padded_array)[len_input:]

def crc_check(input_bitstring, polynomial_bitstring, check_value):
    """Calculate the CRC check of a string of bits using a chosen polynomial."""
    polynomial_bitstring = polynomial_bitstring.lstrip('0')
    len_input = len(input_bitstring)
    initial_padding = check_value
    input_padded_array = list(input_bitstring + initial_padding)
    while '1' in input_padded_array[:len_input]:
        cur_shift = input_padded_array.index('1')
        for i in range(len(polynomial_bitstring)):
            input_padded_array[cur_shift + i] \
            = str(int(polynomial_bitstring[i] != input_padded_array[cur_shift + i]))
    return ('1' not in ''.join(input_padded_array)[len_input:])
>>> crc_remainder('11010011101100', '1011', '0')
'100'
>>> crc_check('11010011101100', '1011', '100')
True

Mathematics

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Mathematical analysis of this division-like process reveals how to select a divisor that guarantees good error-detection properties. In this analysis, the digits of the bit strings are taken as the coefficients of a polynomial in some variable x—coefficients that are elements of the finite field GF(2) (the integers modulo 2, i.e. either a zero or a one), instead of more familiar numbers. The set of binary polynomials is a mathematical ring.

Designing polynomials

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The selection of the generator polynomial is the most important part of implementing the CRC algorithm. The polynomial must be chosen to maximize the error-detecting capabilities while minimizing overall collision probabilities.

The most important attribute of the polynomial is its length (largest degree(exponent) +1 of any one term in the polynomial), because of its direct influence on the length of the computed check value.

The most commonly used polynomial lengths are 9 bits (CRC-8), 17 bits (CRC-16), 33 bits (CRC-32), and 65 bits (CRC-64).[5]

A CRC is called an n-bit CRC when its check value is n-bits. For a given n, multiple CRCs are possible, each with a different polynomial. Such a polynomial has highest degree n, and hence n + 1 terms (the polynomial has a length of n + 1). The remainder has length n. The CRC has a name of the form CRC-n-XXX.

The design of the CRC polynomial depends on the maximum total length of the block to be protected (data + CRC bits), the desired error protection features, and the type of resources for implementing the CRC, as well as the desired performance. A common misconception is that the "best" CRC polynomials are derived from either irreducible polynomials or irreducible polynomials times the factor 1 + x, which adds to the code the ability to detect all errors affecting an odd number of bits.[10] In reality, all the factors described above should enter into the selection of the polynomial and may lead to a reducible polynomial. However, choosing a reducible polynomial will result in a certain proportion of missed errors, due to the quotient ring having zero divisors.

The advantage of choosing a primitive polynomial as the generator for a CRC code is that the resulting code has maximal total block length in the sense that all 1-bit errors within that block length have different remainders (also called syndromes) and therefore, since the remainder is a linear function of the block, the code can detect all 2-bit errors within that block length. If is the degree of the primitive generator polynomial, then the maximal total block length is , and the associated code is able to detect any single-bit or double-bit errors.[11] We can improve this situation. If we use the generator polynomial , where is a primitive polynomial of degree , then the maximal total block length is , and the code is able to detect single, double, triple and any odd number of errors.

A polynomial that admits other factorizations may be chosen then so as to balance the maximal total blocklength with a desired error detection power. The BCH codes are a powerful class of such polynomials. They subsume the two examples above. Regardless of the reducibility properties of a generator polynomial of degree r, if it includes the "+1" term, the code will be able to detect error patterns that are confined to a window of r contiguous bits. These patterns are called "error bursts".

Specification

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The concept of the CRC as an error-detecting code gets complicated when an implementer or standards committee uses it to design a practical system. Here are some of the complications:

  • Sometimes an implementation prefixes a fixed bit pattern to the bitstream to be checked. This is useful when clocking errors might insert 0-bits in front of a message, an alteration that would otherwise leave the check value unchanged.
  • Usually, but not always, an implementation appends n 0-bits (n being the size of the CRC) to the bitstream to be checked before the polynomial division occurs. Such appending is explicitly demonstrated in the Computation of CRC article. This has the convenience that the remainder of the original bitstream with the check value appended is exactly zero, so the CRC can be checked simply by performing the polynomial division on the received bitstream and comparing the remainder with zero. Due to the associative and commutative properties of the exclusive-or operation, practical table driven implementations can obtain a result numerically equivalent to zero-appending without explicitly appending any zeroes, by using an equivalent,[10] faster algorithm that combines the message bitstream with the stream being shifted out of the CRC register.
  • Sometimes an implementation exclusive-ORs a fixed bit pattern into the remainder of the polynomial division.
  • Bit order: Some schemes view the low-order bit of each byte as "first", which then during polynomial division means "leftmost", which is contrary to our customary understanding of "low-order". This convention makes sense when serial-port transmissions are CRC-checked in hardware, because some widespread serial-port transmission conventions transmit bytes least-significant bit first.
  • Byte order: With multi-byte CRCs, there can be confusion over whether the byte transmitted first (or stored in the lowest-addressed byte of memory) is the least-significant byte (LSB) or the most-significant byte (MSB). For example, some 16-bit CRC schemes swap the bytes of the check value.
  • Omission of the high-order bit of the divisor polynomial: Since the high-order bit is always 1, and since an n-bit CRC must be defined by an (n + 1)-bit divisor which overflows an n-bit register, some writers assume that it is unnecessary to mention the divisor's high-order bit.
  • Omission of the low-order bit of the divisor polynomial: Since the low-order bit is always 1, authors such as Philip Koopman represent polynomials with their high-order bit intact, but without the low-order bit (the or 1 term). This convention encodes the polynomial complete with its degree in one integer.

These complications mean that there are three common ways to express a polynomial as an integer: the first two, which are mirror images in binary, are the constants found in code; the third is the number found in Koopman's papers. In each case, one term is omitted. So the polynomial may be transcribed as:

  • 0x3 = 0b0011, representing (MSB-first code)
  • 0xC = 0b1100, representing (LSB-first code)
  • 0x9 = 0b1001, representing (Koopman notation)

In the table below they are shown as:

Examples of CRC representations
Name Normal Reversed Reversed reciprocal
CRC-4 0x3 0xC 0x9

Obfuscation

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CRCs in proprietary protocols might be obfuscated by using a non-trivial initial value and a final XOR, but these techniques do not add cryptographic strength to the algorithm and can be reverse engineered using straightforward methods.[12]

Standards and common use

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Numerous varieties of cyclic redundancy checks have been incorporated into technical standards. By no means does one algorithm, or one of each degree, suit every purpose; Koopman and Chakravarty recommend selecting a polynomial according to the application requirements and the expected distribution of message lengths.[13] The number of distinct CRCs in use has confused developers, a situation which authors have sought to address.[10] There are three polynomials reported for CRC-12,[13] twenty-two conflicting definitions of CRC-16, and seven of CRC-32.[14]

The polynomials commonly applied are not the most efficient ones possible. Since 1993, Koopman, Castagnoli and others have surveyed the space of polynomials between 3 and 64 bits in size,[13][15][16][17] finding examples that have much better performance (in terms of Hamming distance for a given message size) than the polynomials of earlier protocols, and publishing the best of these with the aim of improving the error detection capacity of future standards.[16] In particular, iSCSI and SCTP have adopted one of the findings of this research, the CRC-32C (Castagnoli) polynomial.

The design of the 32-bit polynomial most commonly used by standards bodies, CRC-32-IEEE, was the result of a joint effort for the Rome Laboratory and the Air Force Electronic Systems Division by Joseph Hammond, James Brown and Shyan-Shiang Liu of the Georgia Institute of Technology and Kenneth Brayer of the Mitre Corporation. The earliest known appearances of the 32-bit polynomial were in their 1975 publications: Technical Report 2956 by Brayer for Mitre, published in January and released for public dissemination through DTIC in August,[18] and Hammond, Brown and Liu's report for the Rome Laboratory, published in May.[19] Both reports contained contributions from the other team. During December 1975, Brayer and Hammond presented their work in a paper at the IEEE National Telecommunications Conference: the IEEE CRC-32 polynomial is the generating polynomial of a Hamming code and was selected for its error detection performance.[20] Even so, the Castagnoli CRC-32C polynomial used in iSCSI or SCTP matches its performance on messages from 58 bits to 131 kbits, and outperforms it in several size ranges including the two most common sizes of Internet packet.[16] The ITU-T G.hn standard also uses CRC-32C to detect errors in the payload (although it uses CRC-16-CCITT for PHY headers).

CRC-32C computation is implemented in hardware as an operation (CRC32) of SSE4.2 instruction set, first introduced in Intel processors' Nehalem microarchitecture. ARM AArch64 architecture also provides hardware acceleration for both CRC-32 and CRC-32C operations.

Polynomial representations

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The table below lists only the polynomials of the various algorithms in use. Variations of a particular protocol can impose pre-inversion, post-inversion and reversed bit ordering as described above. For example, the CRC32 used in Gzip and Bzip2 use the same polynomial, but Gzip employs reversed bit ordering, while Bzip2 does not.[14] Note that even parity polynomials in GF(2) with degree greater than 1 are never primitive. Even parity polynomial marked as primitive in this table represent a primitive polynomial multiplied by . The most significant bit of a polynomial is always 1, and is not shown in the hex representations.

Name Uses Polynomial representations Parity[21] Primitive[22] Maximum bits of payload by Hamming distance[23][16][22]
Normal Reversed Reciprocal Reversed reciprocal ≥ 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2[24]
CRC-1 most hardware; also known as parity bit 0x1 0x1 0x1 0x1 even
CRC-3-GSM mobile networks[25] 0x3 0x6 0x5 0x5 odd yes[26] 4
CRC-4-ITU ITU-T G.704, p. 12 0x3 0xC 0x9 0x9 odd
CRC-5-EPC Gen 2 RFID[27] 0x09 0x12 0x05 0x14 odd
CRC-5-ITU ITU-T G.704, p. 9 0x15 0x15 0x0B 0x1A even
CRC-5-USB USB token packets 0x05 0x14 0x09 0x12 odd
CRC-6-CDMA2000-A mobile networks[28] 0x27 0x39 0x33 0x33 odd
CRC-6-CDMA2000-B mobile networks[28] 0x07 0x38 0x31 0x23 even
CRC-6-DARC Data Radio Channel[29] 0x19 0x26 0x0D 0x2C even
CRC-6-GSM mobile networks[25] 0x2F 0x3D 0x3B 0x37 even yes[30] 1 1 25 25
CRC-6-ITU ITU-T G.704, p. 3 0x03 0x30 0x21 0x21 odd
CRC-7 telecom systems, ITU-T G.707, ITU-T G.832, MMC, SD 0x09 0x48 0x11 0x44 odd
CRC-7-MVB Train Communication Network, IEC 60870-5[31] 0x65 0x53 0x27 0x72 odd
CRC-8 DVB-S2[32] 0xD5 0xAB 0x57 0xEA[13] even no[33] 2 2 85 85
CRC-8-AUTOSAR automotive integration,[34] OpenSafety[35] 0x2F 0xF4 0xE9 0x97[13] even yes[33] 3 3 119 119
CRC-8-Bluetooth wireless connectivity[36] 0xA7 0xE5 0xCB 0xD3 even
CRC-8-CCITT ITU-T I.432.1 (02/99); ATM HEC, ISDN HEC and cell delineation, SMBus PEC 0x07 0xE0 0xC1 0x83 even
CRC-8-Dallas/Maxim 1-Wire bus[37] 0x31 0x8C 0x19 0x98 even
CRC-8-DARC Data Radio Channel[29] 0x39 0x9C 0x39 0x9C odd
CRC-8-GSM-B mobile networks[25] 0x49 0x92 0x25 0xA4 even
CRC-8-SAE J1850 AES3; OBD 0x1D 0xB8 0x71 0x8E odd
CRC-8-WCDMA mobile networks[28][38] 0x9B 0xD9 0xB3 0xCD[13] even
CRC-10 ATM; ITU-T I.610 0x233 0x331 0x263 0x319 even
CRC-10-CDMA2000 mobile networks[28] 0x3D9 0x26F 0x0DF 0x3EC even
CRC-10-GSM mobile networks[25] 0x175 0x2BA 0x175 0x2BA odd
CRC-11 FlexRay[39] 0x385 0x50E 0x21D 0x5C2 even
CRC-12 telecom systems[40][41] 0x80F 0xF01 0xE03 0xC07[13] even
CRC-12-CDMA2000 mobile networks[28] 0xF13 0xC8F 0x91F 0xF89 even
CRC-12-GSM mobile networks[25] 0xD31 0x8CB 0x197 0xE98 odd
CRC-13-BBC Time signal, Radio teleswitch[42][43] 0x1CF5 0x15E7 0x0BCF 0x1E7A even
CRC-14-DARC Data Radio Channel[29] 0x0805 0x2804 0x1009 0x2402 even
CRC-14-GSM mobile networks[25] 0x202D 0x2D01 0x1A03 0x3016 even
CRC-15-CAN 0xC599[44][45] 0x4CD1 0x19A3 0x62CC even
CRC-15-MPT1327 [46] 0x6815 0x540B 0x2817 0x740A odd
CRC-16-Chakravarty Optimal for payloads ≤64 bits[31] 0x2F15 0xA8F4 0x51E9 0x978A odd
CRC-16-ARINC ACARS applications[47] 0xA02B 0xD405 0xA80B 0xD015 odd
CRC-16-CCITT X.25, V.41, HDLC FCS, XMODEM, Bluetooth, PACTOR, SD, DigRF, many others; known as CRC-CCITT 0x1021 0x8408 0x811 0x8810[13] even
CRC-16-CDMA2000 mobile networks[28] 0xC867 0xE613 0xCC27 0xE433 odd
CRC-16-DECT cordless telephones[48] 0x0589 0x91A0 0x2341 0x82C4 even
CRC-16-T10-DIF SCSI DIF 0x8BB7[49] 0xEDD1 0xDBA3 0xC5DB odd
CRC-16-DNP DNP, IEC 870, M-Bus 0x3D65 0xA6BC 0x4D79 0x9EB2 even
CRC-16-IBM Bisync, Modbus, USB, ANSI X3.28, SIA DC-07, many others; also known as CRC-16 and CRC-16-ANSI 0x8005 0xA001 0x4003 0xC002 even
CRC-16-OpenSafety-A safety fieldbus[35] 0x5935 0xAC9A 0x5935 0xAC9A[13] odd
CRC-16-OpenSafety-B safety fieldbus[35] 0x755B 0xDAAE 0xB55D 0xBAAD[13] odd
CRC-16-Profibus fieldbus networks[50] 0x1DCF 0xF3B8 0xE771 0x8EE7 odd
Fletcher-16 Used in Adler-32 A & B Checksums Often confused to be a CRC, but actually a checksum; see Fletcher's checksum
CRC-17-CAN CAN FD[51] 0x1685B 0x1B42D 0x1685B 0x1B42D even
CRC-21-CAN CAN FD[51] 0x102899 0x132281 0x064503 0x18144C even
CRC-24 FlexRay[39] 0x5D6DCB 0xD3B6BA 0xA76D75 0xAEB6E5 even
CRC-24-Radix-64 OpenPGP, RTCM104v3 0x864CFB 0xDF3261 0xBE64C3 0xC3267D even
CRC-24-WCDMA Used in OS-9 RTOS. Residue = 0x800FE3.[52] 0x800063 0xC60001 0x8C0003 0xC00031 even yes[53] 4 4 8388583 8388583
CRC-30 CDMA 0x2030B9C7 0x38E74301 0x31CE8603 0x30185CE3 even
CRC-32 ISO 3309 (HDLC), ANSI X3.66 (ADCCP), FIPS PUB 71, FED-STD-1003, ITU-T V.42, ISO/IEC/IEEE 802-3 (Ethernet), SATA, MPEG-2, PKZIP, Gzip, Bzip2, POSIX cksum,[54] PNG,[55] ZMODEM, many others 0x04C11DB7 0xEDB88320 0xDB710641 0x82608EDB[16] odd yes 10 12 21 34 57 91 171 268 2974 91607 4294967263
CRC-32C (Castagnoli) iSCSI, SCTP, G.hn payload, SSE4.2, Btrfs, ext4, Ceph 0x1EDC6F41 0x82F63B78 0x05EC76F1 0x8F6E37A0[16] even yes 6 8 20 47 177 5243 2147483615
CRC-32K (Koopman {1,3,28}) Excellent at Ethernet frame length, poor performance with long files [citation needed] 0x741B8CD7 0xEB31D82E 0xD663B05D 0xBA0DC66B[16] even no 2 4 16 18 152 16360 114663
CRC-32K2 (Koopman {1,1,30}) Excellent at Ethernet frame length, poor performance with long files [citation needed] 0x32583499 0x992C1A4C 0x32583499 0x992C1A4C[16] even no 3 16 26 134 32738 65506
CRC-32Q aviation; AIXM[56] 0x814141AB 0xD5828281 0xAB050503 0xC0A0A0D5 even
Adler-32 Often confused to be a CRC, but actually a checksum; see Adler-32
CRC-40-GSM GSM control channel[57][58][59] 0x0004820009 0x9000412000 0x2000824001 0x8002410004 even
CRC-64-ECMA ECMA-182 p. 51, XZ Utils 0x42F0E1EBA9EA3693 0xC96C5795D7870F42 0x92D8AF2BAF0E1E85 0xA17870F5D4F51B49 even
CRC-64-ISO ISO 3309 (HDLC), Swiss-Prot/TrEMBL; considered weak for hashing[60] 0x000000000000001B 0xD800000000000000 0xB000000000000001 0x800000000000000D odd

Implementations

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CRC catalogues

[edit]

See also

[edit]

References

[edit]
  1. ^ Pundir, Meena; Sandhu, Jasminder Kaur (2021). "A Systematic Review of Quality of Service in Wireless Sensor Networks using Machine Learning: Recent Trend and Future Vision". Journal of Network and Computer Applications. 188: 103084. doi:10.1016/j.jnca.2021.103084. Cyclic Redundancy Check (CRC) mechanism is used to protect the data and provide protection of integrity from error bits when data is transmitted from sender to receiver.
  2. ^ Schiller, Frank; Mattes, Tina (2007). "Analysis of CRC-Polynomials for Safety-Critical Communication by Deterministic and Stochastic Automata". Fault Detection, Supervision and Safety of Technical Processes 2006. Elsevier. pp. 944–949. doi:10.1016/b978-008044485-7/50159-7. ISBN 978-0-08-044485-7. Cyclic Redundancy Check (CRC) is an efficient method to ensure a low probability of undetected errors in data transmission using a checksum as a result of polynomial division.
  3. ^ "An Algorithm for Error Correcting Cyclic Redundance Checks". drdobbs.com. Archived from the original on 20 July 2017. Retrieved 28 June 2017.
  4. ^ Peterson, W. W.; Brown, D. T. (January 1961). "Cyclic Codes for Error Detection". Proceedings of the IRE. 49 (1): 228–235. doi:10.1109/JRPROC.1961.287814. S2CID 51666741.
  5. ^ a b Ergen, Mustafa (21 January 2008). "2.3.3 Error Detection Coding". Mobile Broadband. Springer. pp. 29–30. doi:10.1007/978-0-387-68192-4_2. ISBN 978-0-387-68192-4.
  6. ^ Ritter, Terry (February 1986). "The Great CRC Mystery". Dr. Dobb's Journal. 11 (2): 26–34, 76–83. Archived from the original on 16 April 2009. Retrieved 21 May 2009.
  7. ^ Stigge, Martin; Plötz, Henryk; Müller, Wolf; Redlich, Jens-Peter (May 2006). "Reversing CRC – Theory and Practice" (PDF). Humboldt University Berlin. p. 17. SAR-PR-2006-05. Archived from the original (PDF) on 19 July 2011. Retrieved 4 February 2011. The presented methods offer a very easy and efficient way to modify your data so that it will compute to a CRC you want or at least know in advance.
  8. ^ "algorithm design – Why is CRC said to be linear?". Cryptography Stack Exchange. Retrieved 5 May 2019.
  9. ^ Cam-Winget, Nancy; Housley, Russ; Wagner, David; Walker, Jesse (May 2003). "Security Flaws in 802.11 Data Link Protocols" (PDF). Communications of the ACM. 46 (5): 35–39. CiteSeerX 10.1.1.14.8775. doi:10.1145/769800.769823. S2CID 3132937. Archived (PDF) from the original on 26 May 2013. Retrieved 1 November 2017.
  10. ^ a b c Williams, Ross N. (24 September 1996). "A Painless Guide to CRC Error Detection Algorithms V3.0". Archived from the original on 2 April 2018. Retrieved 23 May 2019.
  11. ^ Press, WH; Teukolsky, SA; Vetterling, WT; Flannery, BP (2007). "Section 22.4 Cyclic Redundancy and Other Checksums". Numerical Recipes: The Art of Scientific Computing (3rd ed.). Cambridge University Press. ISBN 978-0-521-88068-8. Archived from the original on 13 July 2024. Retrieved 20 August 2024.
  12. ^ Ewing, Gregory C. (March 2010). "Reverse-Engineering a CRC Algorithm". Christchurch: University of Canterbury. Archived from the original on 7 August 2011. Retrieved 26 July 2011.
  13. ^ a b c d e f g h i j Koopman, Philip; Chakravarty, Tridib (June 2004). "Cyclic redundancy code (CRC) polynomial selection for embedded networks". International Conference on Dependable Systems and Networks, 2004 (PDF). pp. 145–154. CiteSeerX 10.1.1.648.9080. doi:10.1109/DSN.2004.1311885. ISBN 978-0-7695-2052-0. S2CID 793862. Archived (PDF) from the original on 11 September 2011. Retrieved 14 January 2011.
  14. ^ a b Cook, Greg (15 August 2020). "Catalogue of parametrised CRC algorithms". Archived from the original on 1 August 2020. Retrieved 18 September 2020.
  15. ^ Castagnoli, G.; Bräuer, S.; Herrmann, M. (June 1993). "Optimization of Cyclic Redundancy-Check Codes with 24 and 32 Parity Bits". IEEE Transactions on Communications. 41 (6): 883–892. doi:10.1109/26.231911.
  16. ^ a b c d e f g h Koopman, Philip (July 2002). "32-bit cyclic redundancy codes for Internet applications". Proceedings International Conference on Dependable Systems and Networks (PDF). pp. 459–468. CiteSeerX 10.1.1.11.8323. doi:10.1109/DSN.2002.1028931. ISBN 978-0-7695-1597-7. S2CID 14775606. Archived (PDF) from the original on 16 September 2012. Retrieved 14 January 2011.
  17. ^ Koopman, Philip (21 January 2016). "Best CRC Polynomials". Carnegie Mellon University. Archived from the original on 20 January 2016. Retrieved 26 January 2016.
  18. ^ Brayer, Kenneth (August 1975). Evaluation of 32 Degree Polynomials in Error Detection on the SATIN IV Autovon Error Patterns (Report). National Technical Information Service. ADA014825. Archived from the original on 31 December 2021. Retrieved 31 December 2021.
  19. ^ Hammond, Joseph L. Jr.; Brown, James E.; Liu, Shyan-Shiang (1975). "Development of a Transmission Error Model and an Error Control Model". NASA Sti/Recon Technical Report N. 76 (published May 1975): 15344. Bibcode:1975STIN...7615344H. ADA013939. Archived from the original on 31 December 2021. Retrieved 31 December 2021.
  20. ^ Brayer, Kenneth; Hammond, Joseph L. Jr. (December 1975). Evaluation of error detection polynomial performance on the AUTOVON channel. NTC 75 : National Telecommunications Conference, December 1–3, 1975, New Orleans, Louisiana. Vol. 1. Institute of Electrical and Electronics Engineers. pp. 8–21–5. Bibcode:1975ntc.....1....8B. OCLC 32688603. 75 CH 1015-7 CSCB.
  21. ^ CRCs with even parity detect any odd number of bit errors, at the expense of lower hamming distance for long payloads. Note that parity is computed over the entire generator polynomial, including implied 1 at the beginning or the end. For example, the full representation of CRC-1 is 0x3, which has two 1 bits. Thus, its parity is even.
  22. ^ a b "32 Bit CRC Zoo". users.ece.cmu.edu. Archived from the original on 19 March 2018. Retrieved 5 November 2017.
  23. ^ Payload means length exclusive of CRC field. A Hamming distance of d means that d − 1 bit errors can be detected and ⌊(d − 1)/2⌋ bit errors can be corrected
  24. ^ is always achieved for arbitrarily long messages
  25. ^ a b c d e f ETSI TS 100 909 (PDF). V8.9.0. Sophia Antipolis, France: European Telecommunications Standards Institute. January 2005. Archived (PDF) from the original on 17 April 2018. Retrieved 21 October 2016.
  26. ^ "3 Bit CRC Zoo". users.ece.cmu.edu. Archived from the original on 7 April 2018. Retrieved 19 January 2018.
  27. ^ Class-1 Generation-2 UHF RFID Protocol (PDF). 1.2.0. EPCglobal. 23 October 2008. p. 35. Archived (PDF) from the original on 19 March 2012. Retrieved 4 July 2012. (Table 6.12)
  28. ^ a b c d e f Physical layer standard for cdma2000 spread spectrum systems (PDF). Revision D version 2.0. 3rd Generation Partnership Project 2. October 2005. pp. 2–89–2–92. Archived from the original (PDF) on 16 November 2013. Retrieved 14 October 2013.
  29. ^ a b c "11. Error correction strategy". ETSI EN 300 751 (PDF). V1.2.1. Sophia Antipolis, France: European Telecommunications Standards Institute. January 2003. pp. 67–8. Archived (PDF) from the original on 28 December 2015. Retrieved 26 January 2016.
  30. ^ "6 Bit CRC Zoo". users.ece.cmu.edu. Archived from the original on 7 April 2018. Retrieved 19 January 2018.
  31. ^ a b Chakravarty, Tridib (December 2001). Performance of Cyclic Redundancy Codes for Embedded Networks (PDF) (Thesis). Philip Koopman, advisor. Carnegie Mellon University. pp. 5, 18. Archived (PDF) from the original on 1 January 2014. Retrieved 8 July 2013.
  32. ^ "5.1.4 CRC-8 encoder (for packetized streams only)". EN 302 307 (PDF). V1.3.1. Sophia Antipolis, France: European Telecommunications Standards Institute. March 2013. p. 17. Archived (PDF) from the original on 30 August 2017. Retrieved 29 July 2016.
  33. ^ a b "8 Bit CRC Zoo". users.ece.cmu.edu. Archived from the original on 7 April 2018. Retrieved 19 January 2018.
  34. ^ "7.2.1.2 8-bit 0x2F polynomial CRC Calculation". Specification of CRC Routines (PDF). 4.2.2. Munich: AUTOSAR. 22 July 2015. p. 24. Archived from the original (PDF) on 24 July 2016. Retrieved 24 July 2016.
  35. ^ a b c "5.1.1.8 Cyclic Redundancy Check field (CRC-8 / CRC-16)". openSAFETY Safety Profile Specification: EPSG Working Draft Proposal 304. 1.4.0. Berlin: Ethernet POWERLINK Standardisation Group. 13 March 2013. p. 42. Archived from the original on 12 August 2017. Retrieved 22 July 2016.
  36. ^ "B.7.1.1 HEC generation". Specification of the Bluetooth System. Vol. 2. Bluetooth SIG. 2 December 2014. pp. 144–5. Archived from the original on 26 March 2015. Retrieved 20 October 2014.
  37. ^ Whitfield, Harry (24 April 2001). "XFCNs for Cyclic Redundancy Check Calculations". Archived from the original on 25 May 2005.
  38. ^ Richardson, Andrew (17 March 2005). WCDMA Handbook. Cambridge University Press. p. 223. ISBN 978-0-521-82815-4.
  39. ^ a b FlexRay Protocol Specification. 3.0.1. Flexray Consortium. October 2010. p. 114. (4.2.8 Header CRC (11 bits))
  40. ^ Perez, A. (1983). "Byte-Wise CRC Calculations". IEEE Micro. 3 (3): 40–50. doi:10.1109/MM.1983.291120. S2CID 206471618.
  41. ^ Ramabadran, T.V.; Gaitonde, S.S. (1988). "A tutorial on CRC computations". IEEE Micro. 8 (4): 62–75. doi:10.1109/40.7773. S2CID 10216862.
  42. ^ "Longwave Radio Data Decoding using and HC11 and an MC3371" (PDF). Freescale Semiconductor. 2004. AN1597/D. Archived from the original (PDF) on 24 September 2015.
  43. ^ Ely, S.R.; Wright, D.T. (March 1982). L.F. Radio-Data: specification of BBC experimental transmissions 1982 (PDF). Research Department, Engineering Division, The British Broadcasting Corporation. p. 9. Archived (PDF) from the original on 12 October 2013. Retrieved 11 October 2013.
  44. ^ Cyclic Redundancy Check (CRC): PSoC Creator™ Component Datasheet. Cypress Semiconductor. 20 February 2013. p. 4. Archived from the original on 2 February 2016. Retrieved 26 January 2016.
  45. ^ "Cyclic redundancy check (CRC) in CAN frames". CAN in Automation. Archived from the original on 1 February 2016. Retrieved 26 January 2016.
  46. ^ "3.2.3 Encoding and error checking". A signalling standard for trunked private land mobile radio systems (MPT 1327) (PDF) (3rd ed.). Ofcom. June 1997. p. 3. Archived (PDF) from the original on 14 July 2012. Retrieved 16 July 2012.
  47. ^ Rehmann, Albert; Mestre, José D. (February 1995). "Air Ground Data Link VHF Airline Communications and Reporting System (ACARS) Preliminary Test Report" (PDF). Federal Aviation Authority Technical Center. p. 5. Archived from the original (PDF) on 2 August 2012. Retrieved 7 July 2012.
  48. ^ "6.2.5 Error control". ETSI EN 300 175-3 (PDF). V2.5.1. Sophia Antipolis, France: European Telecommunications Standards Institute. August 2013. pp. 99, 101. Archived (PDF) from the original on 1 July 2015. Retrieved 26 January 2016.
  49. ^ Thaler, Pat (28 August 2003). "16-bit CRC polynomial selection" (PDF). INCITS T10. Archived (PDF) from the original on 28 July 2011. Retrieved 11 August 2009.
  50. ^ "8.8.4 Check Octet (FCS)". PROFIBUS Specification Normative Parts (PDF). 1.0. Vol. 9. Profibus International. March 1998. p. 906. Archived from the original (PDF) on 16 November 2008. Retrieved 9 July 2016.
  51. ^ a b CAN with Flexible Data-Rate Specification (PDF). 1.0. Robert Bosch GmbH. 17 April 2012. p. 13. Archived from the original (PDF) on 22 August 2013. (3.2.1 DATA FRAME)
  52. ^ "OS-9 Operating System System Programmer's Manual". roug.org. Archived from the original on 17 July 2018. Retrieved 17 July 2018.
  53. ^ Koopman, Philip P. (20 May 2018). "24 Bit CRC Zoo". users.ece.cmu.edu. Archived from the original on 7 April 2018. Retrieved 19 January 2018.
  54. ^ "cksum". pubs.opengroup.org. Archived from the original on 18 July 2018. Retrieved 27 June 2017.
  55. ^ Boutell, Thomas; Randers-Pehrson, Glenn; et al. (14 July 1998). "PNG (Portable Network Graphics) Specification, Version 1.2". Libpng.org. Archived from the original on 3 September 2011. Retrieved 3 February 2011.
  56. ^ AIXM Primer (PDF). 4.5. European Organisation for the Safety of Air Navigation. 20 March 2006. Archived (PDF) from the original on 20 November 2018. Retrieved 3 February 2019.
  57. ^ ETSI TS 100 909 Archived 17 April 2018 at the Wayback Machine version 8.9.0 (January 2005), Section 4.1.2 a
  58. ^ Gammel, Berndt M. (31 October 2005). Matpack documentation: Crypto – Codes. Matpack.de. Archived from the original on 25 August 2013. Retrieved 21 April 2013. (Note: MpCRC.html is included with the Matpack compressed software source code, under /html/LibDoc/Crypto)
  59. ^ Geremia, Patrick (April 1999). "Cyclic redundancy check computation: an implementation using the TMS320C54x" (PDF). Texas Instruments. p. 5. Archived (PDF) from the original on 14 June 2012. Retrieved 4 July 2012.
  60. ^ Jones, David T. "An Improved 64-bit Cyclic Redundancy Check for Protein Sequences" (PDF). University College London. Archived (PDF) from the original on 7 June 2011. Retrieved 15 December 2009.

Further reading

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